LT8708
32
Rev 0
For more information
Figure 10. Inductor Current Sense Filter
Figure 9. Currents vs V
IN
/V
OUT
Ratio in Reverse Conduction
INDUCTOR (L) SELECTION
For high efficiency, choose an inductor with low core loss,
such as ferrite. Also, the inductor should have low DC
resistance to reduce the I
2
R losses, and must be able to
handle the peak inductor current without saturating. To
minimize radiated noise, use a toroid, pot core or shielded
bobbin inductor.
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. The following
sections discuss several criteria to consider when choosing
an inductor value. For optimal performance, choose an
inductor that meets all of the following criteria.
L Selection: Load Current in Buck and Boost Regions
Small inductances result in increased ripple currents and
thus, due to the positive and negative inductor current
limits, decrease the maximum average forward I
OUT
in
the boost region and the maximum average reverse I
IN
in the buck region.
In order to provide adequate forward I
OUT
at low V
IN
volt-
ages in the boost region, L should be at least:
L
(MIN1,BOOST)
V
IN(MIN,BOOST)
•
DC
(MAX,M3,BOOST)
100%
2• ƒ •
V
RSENSE(MAX,BOOST,MAXDC)
R
SENSE
–
I
OUT(MAX,FWD)
• V
OUT(MAX,BOOST)
V
IN(MIN,BOOST)
H
≅
where:
DC
(MAX,M3,BOOST)
is the maximum duty cycle percent-
age of the M3 switch (see R
ƒ is the switching frequency
V
RSENSE(MAX,BOOST,MAXDC)
is the maximum current
sense voltage in the boost region at maximum duty
cycle (see R
I
OUT(MAX,FWD)
is the maximum forward V
OUT
current
in boost region
APPLICATIONS INFORMATION
R
SENSE
FILTERING
Certain applications may require filtering of the inductor
current sense signals due to excessive switching noise
that can appear across R
SENSE
. Higher operating voltages,
higher values of R
SENSE
, and more capacitive MOSFETs
will all contribute additional noise across R
SENSE
when the
SW pins transition. The CSP/CSN sense signals can be
filtered by adding one of the RC networks shown in Figure
10. Most PC board layouts can be drawn to accommodate
either network on the same board. The network should
be placed as close as possible to the IC. The network in
Figure 10b can reduce common mode noise seen by the
CSP/CSN pins of the LT8708 at the expense of some
increased ground trace noise as current passes through
the capacitors. A short direct path from the capacitor
grounds to the IC ground should be used on the PC board.
Resistors greater than 10Ω should be avoided as these
can increase offset voltages at the CSP/CSN pins. The RC
product should be kept to less than 30ns.
V
IN
/V
OUT
(V/V)
0.1
1
10
0
0.20
0.40
0.60
0.80
1.00
NORMALIZED CURRENT
8708 F09
MAXIMUM
INTPUT
INDUCTOR
CURRENT
MAXIMUM
CURRENT
R
SENSE
1nF
CSP
CSN
LT8708
10Ω
10Ω
R
SENSE
1nF
1nF
CSP
CSN
LT8708
8708 F10
10Ω
10Ω
10(a)
10(b)
