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LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
Main So
C
O2
0
eMMC
(16GB)
CI
Slot
USB1
(2.0
)
OC
P
USB2
(2.0
)
HDMI
3
HDMI
2(ARC)
HDMI
1
Air/ Cabl
e
TUNE
R
(T2/C/A)
TUNE
R
(S,S2)
DV
B-
S
LN
B
T2/C/S/S2 H
H
-
H-
NIM
tuner
IF
(+/-
)
P_TS_OUT
P_TS_I
N
MI
CO
M
IR
/ KE
Y
USB_WI
FI
X_
TA
L
50MHz
Sub
Assy
LA
N
ETHERNET
SPDIF
AV/COMP
CVBS/YPbPr
SPDIF OU
T
H/P
AMP
RS-232
MAX323
MA
IN
Audio
AM
P
I2S Ou
t
I2
C
0
Vx
1
OSD (4 lane
)
Vx
1
Vx
1
IF_S
IF
NVRAM (256Kb
)
I2
C_
4
I2
C3
IQ (+/-),
IP(+/-
)
HDMI
4
TS
Area OP
T
IR
/Key
0.8V Core
3.3V Norm
al
3.5V ST_B
Y
5V
Norm
al
0.
8V
3.
3V
5V
3.
5V
_S
T
0.
8V
1.
8V
3.
3V
3.
3V
3.
3V
5V
5V
1.
8V
1.
1V
3.
5V
_S
T
3.
5V
_S
T
3.
3V
3.
5V
_S
T
3.
5V
13
V
3.
5V
13
V
13
V
13
V
3.
3V
To
F2
0
From Powe
r
B/
D
13
V
Si
gn
al
P
ro
ce
ss
P
ow
er
S
up
pl
y
In
pu
t/
O
ut
pu
t P
ow
er
To
W
IF
I/B
T
C
om
bo
eMMC
CLK/
DATA
/STR
B
USB3
(2.0
)
IR Blaste
r
Vx
1
VIDEO
(16
lane)
LPDDR4
16Gb
1.1V DD
R
1.
1V
13
V
3.
5V
1.8V DD
R
1.
8V
0.8V CP
U
0.
8V
0.8V
DDR/C4T
X
0.
8V
13
V
13
V
1.8V IO
1.
8V
13
V
1.8V AO
N
1.
8V
3.
5V
MA
IN
Audio
AM
P
13
V
3.
3V
1.
8V
1.
1V
LPDDR4
16Gb
Wo
vC
LK out
/ Da
taIn
MI
C
0.8V AO
N
13
V
0.
8V
F2
0
MA
IN
Audio
AM
P
13
V
3.
3V
H5
D
US
B
US
B
HDM
I2.1
Gigabi
t
ethernet
Содержание OLED88ZXPUA
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