- 11 -
Copyright ©
LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
OCP 1.5A
Audio 3 AM
P
Main IC
USB1
(2
.0
)
OPTI
C
LA
N
LPDDR
4
8G
bx
32
HD
MI1
(2
.1
)
HDMI2
(2
.1
)
HD
MI3
(2
.1
)
SY
STEM
EEPROM
USB2
(2
.0)
USB3
(2
.0)
eMMC
8G
B
Internal Mico
m
P_TS
X_TA
L
50MH
z
I2S
Ou
t
S I D E
S I D E
SPDIF
OU
T
BLUTOOTH
IR/KEY
/E
YE
WI
FI
SU
B
ASSY
CVBS/SI
F
Tune
r
(ARC/e
ARC)
OCP 1.5A
OCP 1.5A
HD
MI4
(2
.1
)
DDR
Controller 64bit
LPDDR
4
16G
bx
32
RS232C
RS232C
Contro
l
AV/CVBS
AV/CVBS
0.8V_CORE_DCD
C
Содержание OLED55CXAUA
Страница 67: ......