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Copyright ©
LG Electronics Inc. All rights reserved.
Only training and service purposes.
Main SoC
eMMC(8GB
)
CI Slot
USB1 (2.0
)
OC
P
USB3 (2.0
)
HDMI3(2.1, eARC)
HDMI2(2.0
)
HDMI1(2.0
)
Air/ Cable
TUNE
R
(T2/C/A)
TUNE
R
(S,S2)
DVB-S
LN
B
T2/C/S/S2 H-NIM tuner
IF (+/-)
P_TS_OUT
P_TS_I
N
MICO
M
IR /
KEY /
MIC
USB_WIFI
X_TA
L
27MHz
Sub Assy
LA
N
ETHERNET
SPDIF
AV/COMP
CVBS/ YPbPr
SPDIF OUT
H/P
RS-232
AMP
MAX323
MAIN Audio AMP
I2S Ou
t
I2
C4
Vx1 / EPI/ CEDS
FCIC SPI/ I2C 6
Main PMIC
48bit
IF_
S
IF
GST/MCLK/GCLK/EO/I2C
6
NVRAM (T2/C/A)
I2C_
1
I2C
2
EPI bloc
k
IQ (+/-), IP(+/-)
HDMI4(2.1
)
TS
K6Hp : DDR4 2666
x8 2EA + x16 2EA (512MB X 4EA)
EPI/CEDS 68P/68P, Vx1 41P/51P
Area OP
T
IR/KEY/MIC
1.2V DDR
0.95
V
Core&CP
U
LDO 2A
1.0V Et
h
3.5V ST_BY
1.8V
5V
Norma
l
Su
b
PMIC
0.95
V
1.2V_DDR
+2.5V_DDR4_VPP
5V
1V
1.8
V
3.5V_ST
0.95
V
1.5
V
3.3
V
13
V
3.3
V
5V
5V
1V
1.8
V
1.8
V
3.5V_S
T
3.5V_S
T
3.3
V
3.5V_ST
3.5V_S
T
13
V
3.5V_ST
3.5V_ST
3.5V_S
T
13
V
3.3V
13
V
13
V
3.3V
13V(PANEL_VCC)
13V(PANEL_VCC)
To Panel
From Powe
r
B/
D
13
V
To WIFI/BT
Combo
eMMC
CLK/DATA/STR
B
3.3V Norma
l
3.3V
13
V
+2.5V_DDR4_VPP
USB2 (2.0
)
PHY_0_2.
0
PHY_1_2.0
PHY_2_2.1
PHY_3_2.1
IR OUT
UEI1703
1.2
V
LDO 2A
+1.2V_Demod
3.3V
K6Lp : DDR3 x 16 2Gb 3ea
MIC : K6HP only
K6HP only
K6HP only
: stand-by
VA
D
: QS
M
Sigal
Powe
r
Power nam
e
BLOCK DIAGRAM
Содержание OLED55BX Series
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