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Copyright © 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
MSM7225A-1-AA
U200
2
2
T
A
2
2
P
A
1
2
R
A
0
2
T
A
1
2
N
A
0
2
M
A
4
2
P
A
3
2
R
A
3
2
N
A
2
2
M
A
8
1
P
A
7
1
R
A
9
1
R
A
8
1
T
A
9
1
N
A
8
1
M
A
8
1
K
A
0
2
K
A
3
A
A
8
D
A
2
2
D
1
N
A
1
3
L
A
0
3
K
A
4
B
5
E
1
1
E
8
D
9
E
3
1
A
2
1
B
7
A
6
B
5
C
5
A
6
D
7
E
3
1
C
1
1
C
4
1
D
8
B
9
A
9
C
7
C
4
F
A
5
E
A
2
F
A
3
E
A
3
L
4
K
1
L
2
K
3
G
4
H
1
J
3
J
6
M
A
2
P
7
R
1
C
A
7
A
A
5
R
8
P
4
V
5
U
K8
T2
AT14
AN15
AM14
AT12
AM12
AP14
AR13
AN13
AK14
AR11
AJ13
AP12
W3
U1
Y4
AA1
AP8
AR7
AN7
AT6
AP6
AR5
AB2
AA5
AC3
Y2
U3
AP4
AT4
AN5
AR3
AP2
AN3
N7
N5
N3
R1
AK8
AL5
AL3
AM2
AM30
AJ29
AP30
AR31
AJ27
AN29
AK28
AT28
AR27
AP26
AM28
AK24
AN27
AK26
AM26
AT26
AJ25
AR25
AM24
AN25
AJ15
AP36
AN35
AR33
AR15
AN17
AM16
AT32
G23
E25
G25
D24
C25
E23
G19
E19
H18
C19
H22
AB4
AG3
AG1
E33
G33
D36
A33
B34
C33
E31
B32
B28
G27
D26
C29
D32
A31
H26
C31
AB36
P36
AD32
H30
P32
P34
AB32
H36
K36
T36
Y36
AJ35
AH30
AB30
AA29
AG29
AF36
AE35
W29
AB34
AG33
AD34
AE29
Y30
AF30
AH36
AH34
AC29
AF34
AG35
AE33
AD30
AH32
AJ33
AF32
J29
K30
K32
G35
H32
J33
J35
H34
L29
K34
M32
M30
M34
N33
N29
N35
R29
R35
T30
P30
T34
R33
V32
T32
V30
V34
U29
AA33
Y34
Y32
W35
AA35
3
R
4
P
2
3
K
A
6
3
M
A
3
3
L
A
4
3
M
A
2
3
M
A
5
3
L
A
0
1
P
A
1
3
N
A
8
2
H
A
2
1
K
A
2
3
P
A
3
3
N
A
4
3
T
A
8
T
A
4
1
B
5
1
C
5
1
E
6
1
B
5
1
G
6
1
D
4
1
H
8
1
B
5
1
A
7
1
C
2
1
H
1
J
A
4
H
A
2
H
A
7
1
E
0
2
H
8
1
D
7
1
G
6
1
H
9
1
A
3
1
E
3
1
G
5
J
A
5
G
A
7
G
A
3
J
A
7
J
A
7
E
A
1
2
C
0
2
B
2
2
B
1
2
A
3
2
C
2
F
1
E
3
E
2
D
8
M
A
0
1
M
A
0
1
K
A
1
1
N
A
1
1
J
A
5
2
A
9
2
G
7
2
C
7
2
E
7
2
A
9
2
E
8
2
H
6
2
B
4
3
D
2
3
F
5
3
C
N
_
E
O
_
2
I
B
E
N
_
E
W
_
2
I
B
E
N
_
B
U
_
2
I
B
E
N
_
B
L
_
2
I
B
E
N
_
T
I
A
W
_
2
I
B
E
N
_
0
S
C
_
2
I
B
E
N
_
1
S
C
_
2
I
B
E
8
9
_
O
I
P
G
_
N
_
2
S
C
_
2
I
B
E
K
L
C
_
2
I
B
E
N
_
V
D
A
_
2
I
B
E
N
_
0
Y
S
U
B
_
2
I
B
E
N
E
_
G
O
D
W
0
E
D
O
M
1
E
D
O
M
2
E
D
O
M
3
E
D
O
M
R
L
_
S
T
L
L
_
S
T
R
U
_
S
T
L
U
_
S
T
S
U
B
V
_
Y
H
P
B
S
U
P
D
_
Y
H
P
B
S
U
N
D
_
Y
H
P
B
S
U
D
I
_
Y
H
P
B
S
U
T
X
E
R
_
Y
H
P
B
S
U
I
D
T
O
D
T
S
M
T
K
C
T
N
_
T
S
R
T
K
C
T
R
2
3
1
_
O
I
P
G
1
3
1
_
O
I
P
G
0
3
1
_
O
I
P
G
9
2
1
_
O
I
P
G
8
2
1
_
O
I
P
G
7
2
1
_
O
I
P
G
6
2
1
_
O
I
P
G
5
2
1
_
O
I
P
G
4
2
1
_
O
I
P
G
3
2
1
_
O
I
P
G
2
2
1
_
O
I
P
G
1
2
1
_
O
I
P
G
0
2
1
_
O
I
P
G
9
1
1
_
O
I
P
G
8
1
1
_
O
I
P
G
7
1
1
_
O
I
P
G
6
1
1
_
O
I
P
G
5
1
1
_
O
I
P
G
4
1
1
_
O
I
P
G
3
1
1
_
O
I
P
G
2
1
1
_
O
I
P
G
1
1
1
_
O
I
P
G
0
1
1
_
O
I
P
G
9
0
1
_
O
I
P
G
8
0
1
_
O
I
P
G
7
0
1
_
O
I
P
G
7
9
_
O
I
P
G
6
9
_
O
I
P
G
5
9
_
O
I
P
G
4
9
_
O
I
P
G
3
9
_
O
I
P
G
2
9
_
O
I
P
G
1
9
_
O
I
P
G
0
9
_
O
I
P
G
9
8
_
O
I
P
G
8
8
_
O
I
P
G
7
8
_
O
I
P
G
6
8
_
O
I
P
G
EBI1_DQ_0
EBI1_DQ_1
EBI1_DQ_2
EBI1_DQ_3
EBI1_DQ_4
EBI1_DQ_5
EBI1_DQ_6
EBI1_DQ_7
EBI1_DQ_8
EBI1_DQ_9
EBI1_DQ_10
EBI1_DQ_11
EBI1_DQ_12
EBI1_DQ_13
EBI1_DQ_14
EBI1_DQ_15
EBI1_DQ_16
EBI1_DQ_17
EBI1_DQ_18
EBI1_DQ_19
EBI1_DQ_20
EBI1_DQ_21
EBI1_DQ_22
EBI1_DQ_23
EBI1_DQ_24
EBI1_DQ_25
EBI1_DQ_26
EBI1_DQ_27
EBI1_DQ_28
EBI1_DQ_29
EBI1_DQ_30
EBI1_DQ_31
EBI_ADR0
EBI_ADR1
EBI_ADR2
EBI_ADR3
EBI_ADR4
EBI_ADR5
EBI_ADR6
EBI_ADR7
EBI_ADR8
EBI_ADR9
EBI_ADR10
EBI_ADR11
EBI_ADR12
EBI_ADR13
EBI_ADR14
EBI1_CKE0
EBI1_CKE1
EBI1_DCLK
EBI1_DCLKB
EBI1_WE_N
EBI1_CS0_N
EBI1_CS1_N
EBI1_BA_0
EBI1_BA_1
EBI1_DQS0
EBI1_DQS1
EBI1_DQS2
EBI1_DQS3
EBI1_DM0
EBI1_DM1
EBI1_DM2
EBI1_DM3
EBI1_RAS_N
EBI1_CAS_N
EBI1_CAL
EBI2_A_D_0
EBI2_A_D_1
EBI2_A_D_2
EBI2_A_D_3
EBI2_A_D_4
EBI2_A_D_5
EBI2_A_D_6
EBI2_A_D_7
EBI2_A_D_8
EBI2_A_D_9
EBI2_A_D_10
EBI2_A_D_11
EBI2_A_D_12
EBI2_A_D_13
EBI2_A_D_14
EBI2_A_D_15
MPM_GPIO_0
MPM_GPIO_1
MPM_GPIO_2
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75
GPIO_76
GPIO_77
GPIO_78
GPIO_79
GPIO_80
GPIO_81
GPIO_82
GPIO_83
GPIO_84
GPIO_85
L
T
C
_
R
W
P
_
A
P
M
_
L
T
C
_
R
W
P
_
A
P
0
E
G
N
A
R
_
A
P
0
N
O
_
A
P
F
E
R
_
G
B
_
M
S
G
F
E
R
I
_
C
A
D
N
O
_
X
T
J
D
A
_
C
G
A
_
X
T
J
D
A
_
O
L
_
K
R
T
0
H
C
_
M
I
_
I
0
H
C
_
P
I
_
I
0
H
C
_
M
I
_
Q
0
H
C
_
P
I
_
Q
1
H
C
_
M
I
_
I
1
H
C
_
P
I
_
I
1
H
C
_
M
I
_
Q
1
H
C
_
P
I
_
Q
N
_
T
U
O
_
I
P
_
T
U
O
_
I
N
_
T
U
O
_
Q
P
_
T
U
O
_
Q
N
I
_
L
_
E
N
I
L
P
I
_
L
_
E
N
I
L
N
I
_
R
_
E
N
I
L
P
I
_
R
_
E
N
I
L
F
E
R
V
_
H
P
H
L
_
H
P
H
R
_
H
P
H
N
I
X
U
A
P
I
X
U
A
N
1
C
I
M
P
1
C
I
M
N
2
C
I
M
P
2
C
I
M
N
O
_
1
R
A
E
P
O
_
1
R
A
E
N
O
_
E
N
I
L
P
O
_
E
N
I
L
T
U
O
_
X
U
A
P
M
O
C
C
S
A
I
B
_
C
I
M
N
_
N
I
S
E
R
N
_
T
U
O
S
E
R
K
L
C
_
P
L
S
K
L
C
S
Y
S
_
Y
H
P
B
S
U
D
V
S
R
O
X
C
T
L
A
C
_
I
P
I
M
O
D
L
_
I
P
I
M
P
_
K
L
C
_
I
S
D
_
I
P
I
M
N
_
K
L
C
_
I
S
D
_
I
P
I
M
P
_
1
E
N
A
L
_
I
S
D
_
I
P
I
M
N
_
1
E
N
A
L
_
I
S
D
_
I
P
I
M
2
D
V
S
R
1
D
V
S
R
P
_
K
L
C
_
1
I
S
C
_
I
P
I
M
N
_
K
L
C
_
1
I
S
C
_
I
P
I
M
P
_
0
E
N
A
L
_
1
I
S
C
_
I
P
I
M
N
_
0
E
N
A
L
_
1
I
S
C
_
I
P
I
M
P
_
K
L
C
_
2
I
S
C
_
I
P
I
M
N
_
K
L
C
_
2
I
S
C
_
I
P
I
M
P
_
0
E
N
A
L
_
2
I
S
C
_
I
P
I
M
N
_
0
E
N
A
L
_
2
I
S
C
_
I
P
I
M
P
_
1
E
N
A
L
_
2
I
S
C
_
I
P
I
M
N
_
1
E
N
A
L
_
2
I
S
C
_
I
P
I
M
R213
49.9
R204
100
VREG_MSME_1.8V
10
2
R
K0
1
C218
330p
C206
1n
X200
KT2520F19200DCW28RAK
19.2MHZ
4
3
5
2
6
1
VCONTROL
VCC
NC1
NC2
GND
OUT
C217
10n
C229
22u
CN200
8
7
9
6
10
5
11
4
12
3
13
2
14
1
C205
2.2n
C228
0.1u
C227
47p
S
AI
B_
CI
M
20
2
R
K2.
2
90
2
C
u1.
0
C207
0.1u
C225
0.1u
11
2
C
u1
21
2
R
K0
1
ZD200
C216
0.1u
91
2
R
02
04
01
2
C
u1.
0
12
2
R
I
N
D
C220
7.5p
C221
DNI
81
2
R
I
N
D
71
2
R
K0
01
21
2
C
u1.
0
C226
33p
R206
10
24
R211
00
2
D
R220
10K
R210
24
80
2
C
u1.
0
51
2
C
u1.
0
41
2
C
u1.
0
31
2
C
u1
330p
C219
VREG_TCXO_2.85V
T
S
R_
N
O
Pn
O
X
C
T_
CI
M
P
KL
C_
P
E
EL
S
T
U
O
T
E
S
E
Rn
TCXO_EN
nSDRAM_WE
nSDRAM_RAS
SDRAM_DQS3
SDRAM_DQS2
SDRAM_DQS1
SDRAM_DQS0
SDRAM_DQM3
SDRAM_DQM2
SDRAM_DQM1
SDRAM_DQM0
SDRAM_DCLK1
SDRAM_DCLK0
nSDRAM_CAS
SDRAM_BA1
SDRAM_BA0
TCXO_RTR_19.2MHZ
P
M
A
R_
A
P_
M
S
G
JTAG_PS_HOLD
T
NI
_
N
OI
T
O
M
PROX_OUT
P
O_
E
NI
L
L_
M
F
R_
M
F
F
E
R_
C
A
D_
A
P_
M
S
G
TCXO_PM_19.2MHZ
X
T_
T
R
A
U
UART_TX
X
R_
T
R
A
U
UART_RX
BT_PCM_CLK
BT_PCM_SYNC
P
D_
H
B
S
U
R_
H
P
H
L_
H
P
H
BT_UART_CTS
BT_UART_RTS
PS_HOLD
PM_INT_N
CAM_MCLK
VREG_MSME_1.8V
VREG_MSME_1.8V
P_
V
C
R
N_
V
C
R
N
O_
X
T
MINIABB_INT
EAR_SENSE
TOUCH_I2C_SDA
TOUCH_INT
TOUCH_I2C_SCL
SDRAM_DATA[25]
SDRAM_DATA[18]
SDRAM_DATA[15]
SDRAM_DATA[12]
nSDRAM_CS0
SDRAM_CKE0
WLAN_CLK
WLAN_CMD
CI
M_
S
H
nSDRAM_CS1
SDRAM_CKE1
L
C
S_
C2I
_L
B_
D
CL
A
D
S_
C2I
_L
B_
D
CL
KEY_COL[0]
KEY_ROW[1]
KEY_ROW[0]
F
E
R_
C
A
D
P_I
_
X
T
M_I
_
X
T
P_
Q_
X
T
M_
Q_
X
T
P_I
_0
X
R
M_I
_0
X
R
M_
Q_
0
X
R
P_
Q_
0
X
R
P_I
_1
X
R
M_I
_1
X
R
M_
Q_
1
X
R
P_
Q_
1
X
R
GPS_MODE
RTR6285_SSBI
TRK_LO_ADJ
WLAN_SDIO[3]
WLAN_SDIO[2]
WLAN_SDIO[1]
WLAN_SDIO[0]
0
N
O_
A
P
BT_PCM_OUT
BT_PCM_IN
PMIC_SSBI
nMICROSD_DET
MMC_CLK
P1
_
CI
M
ANT_SEL2
0
R_
A
P
BT_RST_N
BT_UART_RX
BT_UART_TX
ANT_SEL1
SDRAM_DATA[16]
SDRAM_DATA[0]
SDRAM_DATA[1]
SDRAM_DATA[2]
SDRAM_DATA[3]
SDRAM_DATA[4]
SDRAM_DATA[5]
SDRAM_DATA[6]
SDRAM_DATA[7]
SDRAM_DATA[8]
SDRAM_DATA[9]
SDRAM_DATA[10]
SDRAM_DATA[11]
SDRAM_DATA[13]
SDRAM_DATA[14]
SDRAM_DATA[17]
SDRAM_DATA[19]
SDRAM_DATA[20]
SDRAM_DATA[21]
SDRAM_DATA[22]
SDRAM_DATA[23]
SDRAM_DATA[24]
SDRAM_DATA[26]
SDRAM_DATA[27]
SDRAM_DATA[28]
SDRAM_DATA[29]
SDRAM_DATA[30]
SDRAM_DATA[31]
SDRAM_ADDR[0]
SDRAM_ADDR[1]
SDRAM_ADDR[10]
SDRAM_ADDR[11]
SDRAM_ADDR[12]
SDRAM_ADDR[2]
SDRAM_ADDR[4]
SDRAM_ADDR[5]
SDRAM_ADDR[6]
SDRAM_ADDR[7]
SDRAM_ADDR[8]
SDRAM_ADDR[9]
SDRAM_ADDR[13]
N
T
S
R
T_
M
S
M
MSM_TRSTN
K
C
T
R_
M
S
M
MSM_RTCK
T
U
O
S
E
R_
G
A
TJ
n
nJTAG_RESOUT
K
C
T_
M
S
M
MSM_TCK
I
D
T_
M
S
M
MSM_TDI
O
D
T_
M
S
M
MSM_TDO
S
M
T_
M
S
M
MSM_TMS
N_
T
E
S
E
R_
D
CL
WLAN_RST_N
CAM_RESET_N
L
C
S_
C2I
_
OI
D
U
A
L
C
S_
C2I
_
B
B
AI
NI
M
A
D
S_
C2I
_
OI
D
U
A
A
D
S_
C2I
_
B
B
AI
NI
M
MMC_DATA[2]
MMC_CMD
MMC_DATA[3]
MMC_DATA[0]
MMC_DATA[1]
VREG_MSMA1_2.6V
M
D_
H
B
S
U
N
O_
E
NI
L
MOTION_I2C_SCL
MOTION_I2C_SDA
PROX_I2C_SCL
PROX_I2C_SDA
CAM_I2C_SDA
CAM_I2C_SCL
OL
_
K
R
T
O_
C
N
Y
S
V_
D
CL
3.5PI_KEY_POLE_DET
E
D
O
M_
CI
M
DI
L
A
V_
G
H
C
DI
_
H
C
U
O
T
Y
D
R
D_
S
S
A
P
M
O
C
DI
_
B
S
U
D
M
C_
C
M
Me
KL
C_
C
M
Me
eMMC_DATA[7]
eMMC_DATA[6]
eMMC_DATA[5]
]4[
A
T
A
D_
C
M
Me
]3[
A
T
A
D_
C
M
Me
]2[
A
T
A
D_
C
M
Me
]1[
A
T
A
D_
C
M
Me
]0[
A
T
A
D_
C
M
Me
SDRAM_ADDR[3]
ANT_SEL3
N1
_
CI
M
N
C
W_
A
D
S_
N
O
M
M
O
C_
C2I
N
C
W_
L
C
S_
N
O
M
M
O
C_
C2I
FM_RDS_INT
S
C_
D
CL
EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[10]
EBI2_DATA[11]
EBI2_DATA[12]
EBI2_DATA[13]
EBI2_DATA[14]
EBI2_DATA[15]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
EBI2_DATA[7]
EBI2_DATA[8]
EBI2_DATA[9]
2
E
On
2
E
Wn
DI
_
R
K
M_
D
CL
CAM_PWDN
N
KL
C_I
S
C_I
PI
M
P
KL
C_I
S
C_I
PI
M
N
D_I
S
C_I
PI
M
P
D_I
S
C_I
PI
M
MSM_USIM1_CLK
MSM_USIM1_DATA
ANT_SEL0
PA_ON1
LCD_RS
KEY_COL[1]
MOTION_INT2
COMPASS_INT
KEY_ROW[2]
Delete 11.10.31
NEST JIG
GPS D FLIP-FLOP
ARM9 & Cortex A-5 JTAG
Delete 11.09.26
03/09 Change
TCXO Circuit
Clesed to TCXO
Array TP
Delete 11.05.19
0001 : Native, ARM9 + ARM11 on PJTAG
MODE[3:0]
ARM9&ARM11 JTAG
0000 : Native, ARM9 on PJTAG, ARM11 on AJTAG