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Copyright © 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
R125
10K
U102
61
T
1T
61
A
1
A
9L
51
K
21
G
51
A
51
B
61
B
31
E
41
C
31
D
21
A
11
A
01
D
01
B
7
A
7
B
01
A
9
B
21
C
11
B
T2
T5
R3
R15
M6
R16
R8
T4
R9
T3
N8
R6
R1
T15
P5
T14
T6
T13
R2
R12
P16
R10
T9
H16
T8
F16
R7
H15
T7
G16
R14
T12
J15
T11
J16
T10
J14
N9
P7
D15
N5
E14
N6
C15
E16
H5
C16
G4
G7
E15
P15
D16
H6
G8
H14
G3
G2
P1
H2
P2
G1
N2
H1
L5
M1
M15
M2
K13
N1
L16
N15
L15
N16
K14
M16
K16
N4
K5
M10
P10
F7
C3
N12
D1
P12
D3
M11
E3
N11
D2
C1
N13
A2
M13
B2
M14
B1
P14
A5
A6
K4
A3
L1
A4
K3
K2
F2
K1
F1
M3
L2
A8
M4
A9
J2
J1
11
K
21
L
5J
7
M
5
R
9
H
8J
9J
8L
7
K
6J
01
G
01
K
31
J
21
J
11
J
8
D
01
C
41
B
41
A
31
B
31
A
21
D
21
B
9
E
6
C
6
D
7
C
5
E
2
C
6
B
3
B
7
E
2
E
6
E
5F
6F
21
F
11
H
11
F
51
F
41
F
11
E
9F
F
E
R
V
D
N
G
A
BI
V
BI
V_
S
S
V
18
V1
D
D
V
U
M
P_
T
A
B
V
U
M
P_
S
S
V
1F
R
V
O
X
D
D
V
O
X
S
S
V
C
DT
D
D
V
GI
D
S
S
V
F
R
S
S
V
OL
S
S
V
X
RT
D
D
V
O
C
D
S
S
V
T
A
B
V
2F
R
D
D
V
X
RT
S
S
V
S
M
D
D
V
P
ST
A
B
V
R
SL
S
S
V
1
P
C
2
P
C
G
E
N
D
D
V
S
M_
8
V1
_
D
D
V
S
M
S
S
V
R
MF
_
D
D
V
CT
R
V
MI
S
V
U
M
P
V
X
U
A
V
E
R
O
C
V
1
E
R
O
C
D
D
V
2
E
R
O
C
D
D
V
4
E
R
O
C
S
S
V
1
E
R
O
C
S
S
V
2
E
R
O
C
S
S
V
3
E
R
O
C
S
S
V
1
U
B
E_
D
D
V
2
U
B
E_
D
D
V
1
OI
D
D
V
2
OI
D
D
V
3
OI
D
D
V
KP_0
KP_1
FMRIN
KP_2
FMRINX
KP_3
KP_4
XO
KP_5
XOX
KP_6
KP_7
RX12
KP_8
RX12X
KP_9
RX34
RX34X
RXD0
TX1
TXD0
TX2
RXD1
FE1
TXD1
FE2
PABS
SSC0_MTSR
PAEN
SSC0_MRST
PABIAS
SSC0_CLK
VRAMP
DISP_RESET
VDET
FSYS1
I2C_SCL
I2C_SDA
CLKOUT0
T2IN
CC_IO_1
F32K
CC_CLK_1
OSC32K
CC_RST_1
RESET_OUT_N
CC_IO_2
RESET_IN_N
CC_CLK_2
NMI_N
CC_RST_2
CC03IO
CC05IO
TDO
DIGUP1
TDI
DIGUP2
TMS
DIGUP_CLK
TCK
TRST_N
ONOFF
TRIG_IN
TRIG_OUT
CS
MON1
CSB
MON2
MON3
VCHG
MON4
VDDCHG
VSHNT
AD0
SENSEN
AD1
SENSEP
AD2
AD3
LEDFBN
AD4
LEDFBP
AD5
LEDDRV
AD6
AD7
SD1SW
AD8
SD1_FB
AD9
VDD_SD1
AD10
VSS_SD1
AD11
AD12
ADV_N
AD13
WR_N
AD14
RD_N
AD15
WAIT_N
A16
RDY_N
A17
BFCLKO
A18
BC0_N
A19
BC1_N
A20
CS0_N
A21
CS1_N
A22
CS3_N
N
SL
P
SL
1
N
CI
M
1
P
CI
M
2
N
CI
M
2
P
CI
M
CI
M
U
V
CI
M
V
N
P
E
P
P
E
L
S
H
R
SL
0
M
1
M
2
M
3
M
N
O
M
A
N
A
D
C
A
SF
D
D
V
2F
R
S
S
V
2
C
N
5
E
R
O
C
S
S
V
6
E
R
O
C
S
S
V
C136
10u
R126
DNI
R118
2.4K
VAUX_2V85
VDD_IO_1V8
VRTC
C102
2.2u
R106
0
R105
DNI
3.3u
L101
VMIC_BIAS_P
u2.
2
01
1
C
10K
R109
R114
DNI
C101
0.1uF
TP108
T
A
B
V
VAUX_2V85
VSIM_PWR
VCORE
X101
TSX-3225
26MHz
2
1
3
4
GND2
HOT2
HOT1
GND1
p7.
4
51
1
C
VBAT
03
1
C
Fu
74
00.
0
TP109
8
V1
_
OI
_
D
D
V
VBAT
TP102
C123
0.22uF
39K
R117
1u
C103
22uF
C135
22p
C133
VDDRF2
470ohms
R113
31
1
C
F
U1
Fu
74
0.
0
90
1
C
R112 10K
Fu
1.
0
91
1
C
VDD_IO_1V8
TP101
Fu
22.
0
80
1
C
1UF
C105
VDD_IO_1V8
VDDMS
VDDTRX
VDD_IO_1V8
VDD_IO_1V8
Q101
2
1
3
VAUX_2V85
Fu
74
0.
0
61
1
C
Fu
1.
0
60
1
C
71
1
C
Fu
74.
0
12
1
C
Fu
1.
0
42
1
C
Fu
33
0.
0
100Kohms
R110
TP103
VDDTDC
L102
27n
VDDXO
VBAT
Fu
1.
0
70
1
C
VDD_IO_1V8
CN101
9
8
7
6
5
4
3
2
1
VDD_IO_1V8
32.768KHz
MC-146_12_5PF
X102
2
1
3
4
TP104
11
1
C
Fu
1.
0
02
1
C
Fu
1.
0
u2.
2
21
1
C
Fu
74.
0
22
1
C
10K
R116
U103
9
5
4
6
3
7
2
8
1 /CS
VCC
DO_IO1/HOLD_IO3
/WP_IO2
CLK
GND
DI_IO0
G_SLUG
Fu
1.
0
92
1
C
C134
22p
R115
3.9K
VBAT
VAUX_2V85
Fu
22.
0
81
1
C
VAUX_2V85
C132
1u
L103
27n
L107
27n
L104
27n
L105
27n
L106
27n
LCD_CS_N
MEM_A_[16]
KEY_BACKLIGHT
RF_TX_RAMP
RF_TX_EN
DI
_
R
E
K
A
M_
D
CL
I2C_SDA
I2C_SCL
P_
BI
V
P_
CI
M_
S
H
N_
CI
M_
S
H
RF_LB_TX
RF_HB_RXN
RF_HB_RXP
RF_LB_RXN
RF_LB_RXP
R_
S
H
L_
S
H
MEM_AD_[15]
MEM_AD_[14]
MEM_AD_[13]
MEM_AD_[12]
MEM_AD_[11]
MEM_AD_[10]
MEM_AD_[09]
MEM_AD_[08]
MEM_AD_[03]
MEM_AD_[03]
MEM_AD_[02]
MEM_AD_[02]
MEM_AD_[01]
MEM_AD_[01]
MEM_AD_[00]
MEM_AD_[00]
MEM_RD_N
MEM_WR_N
SIM_DATA_1
SIM_CLK_1
SIM_RST_1
END_KEY
UART_TX
UART_TX
UART_RX
UART_RX
RF_HB_TX
DSS
NLCD_RESET_1.8
N_
CI
M_
NI
A
M
P_
CI
M_
NI
A
M
ABB_INT_N
RF_VLOGIC
MEM_CLK
MEM_CLK
F_MODE
F_MODE
RESET_IN
RESET_IN
JTAG_TRST_N
JTAG_TRST_N
JTAG_TDI
JTAG_TDI
JTAG_TMS
JTAG_TMS
JTAG_TCK
JTAG_TCK
JTAG_TDO
JTAG_TDO
ROM_CS_N
ROM_CS_N
MEM_AVD_N
KEY_IN0
KEY_IN2
KEY_OUT4
KEY_IN3
KEY_OUT3
KEY_OUT2
P_
K
P
S
N_
K
P
S
KEY_OUT1
KEY_IN4
KEY_IN1
P
M
ET
_T
A
B
RF_2G_BS
DIRTY_GND
CLEAN_GND
DIRTY_GNDDIRTY_GND
CLEAN_GND
DIRTY_GND
CLEAN_GND
INTR?
VPMU
2-6-1_1_IFX_EGV3_BASIC
ECZH0025502
(22uF,6.3V,20%,X5R,2012)
1.2V
VANA
VAUX
10mA
1.3V
150mA
2.85V
VRTC
VSIM
2mA
2.3V
30mA
2.85V
VRF1
VRF2
60mA
1.8V
70mA
2.5V
VDDMMD
VDD_TDC
12mA
1.3V
6mA
1.3V
VDD_TRX
VDD_NEG
ECCH0007803
(10uF,10V,M,X5R,1608)
VDDP_MEM1
VDD1V8
VCORE
Max. Curr
VDDP_DIG3
VDDP_SIM
VDDP_DIG1
VDDP_DIG1
VDDP_DIG2
VDDP_MEM2
450mA
1.8V
Volt.
100mA
VDDP_MEM1
EX2IN
CC16IOA
VRTC
VDDP_DIG1
VDDP_RTC
VDDP_DIG1
VDDP_MEM2
VDDP_MEM2
VDDP_MEM2
VDDP_MEM1
VDDP_MEM1
VDDP_MEM1
ON BOARD ARM9 JTAG & ETM INTERFACE
30mA
1.4V
100mA
-1.3V
EX4IN
VDDP_DIG1
VDDP_DIG2
STAR_GND
(FOR SW DEBUGGING / NOT MOUNTED)
(NOT MOUNTED)
Serial Flash
7. CIRCUIT DIAGRAM