3. H/W Circuit Description
- 15 -
3.1. RF Circuit
The RF parts consist of a transmitter part, a receiver part, a frequency synthesizer part, a voltage
supply part, and a VC-TCXO part.
The AeroI transceiver is composed of one RF chipset, Si4205[U803] which is a triple and quad-band
GSM/GPRS wireless communications.
This device integrated a receiver based on a low IF (100KHz) architecture, a transmitter based on
modulation loop architecture and the synthesizer part with built in VCOs.
The transceiver employed a 3 wire serial interface to allow an external system controller to write the
control registers for dividers, receive path gain, power down setting, and other controls.
3.1.1. Front End Part
RF front end consists of Antenna Switch(FL801), triple-band LNAs integrated in transceiver(U803).
The Received RF signals (GSM850 869 ~ 894MHz, DCS 1805 ~ 1880MHz and PCS 1930 ~
1990MHz) are fed into the antenna or mobile switch. An antenna matching circuit is between the
antenna and the mobile switch. The Antenna Switch(FL801) is used for control the Rx and TX paths.
And, the input signals VC1, VC2 and VC3 of a FL801 are directly connected to baseband controller to
switch either TX or RX path on. Ant S/W module(FL801) is an antenna switch module for dual band
phone. The logic and current is given below Table 1.
The receiver part uses a low-IF receiver architecture that allows for the on-chip integration of the
channel selection filters, eliminating the external RF image reject filters and the IF SAW filter required
in conventional super-heterodyne architecture. The Si4205[U803] integrates three differential input
LNAs that are matched to the 200 ohm balanced-output SAW filters through external LC matching
networks.
3. H/W Circuit Description
VC1
VC2
VC3
Current
GSM850/DCS RX
0 V
0 V
0 V
< 0.1 mA
PCS RX
2.85 V
0 V
0 V
10.0 mA max
GSM850 TX
0 V
0 V
2.85 V
10.0 mA max
DCS/PCS
2.85 V
2.85 V
0 V
10.0 mA max
Table 3-1. The Logic and Current
Содержание L1150
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