LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 39 -
G. KT520 Bluetooth Schematic
• Clock
- Clock request
→
Connected to CLKREQ of DB3150 and AB3000, input to RF3000
- Fast clock : 26MHz
→
Supplied MCLK from RF3000
→
Frequency deviation : ± 20ppm
- Low power clock : 32.768kHz
→
Supplied RTCCLK from AB3000
• Power - Supplied 2.75V, 1.8V from internal regulators of AB3000
• Reset - RESOUT2_n signal of DB3150 controls STLC2500C reset.
• SPI
- Connected to SPI of DB3150
- HCI interface between DB3150 and STLC2500C
• PCM - Audio signal interface between DB3150/AB3000 and STLC2500C
• ANT - 2.4GHz, 50 ohm matching
Bluetooth
VSS_ANA2
B6
C6
VSS_ANA3
VSS_DIG1
E3
E4
VSS_DIG2
VSS_RF1
A2
VSS_RF2
A5
VSS_BT_RF
A6
TOUT_IP_QN
G4
UART_CTS
UART_RTS
F4
F5
UART_RXD
UART_TXD
F6
D7
VDD_CL
VDD_CLD
E7
G2
VDD_D
VDD_DSM
B7
A7
VDD_HV_A
VDD_HV_D
G1
VDD_IO_A
G5
F3
VDD_IO_B
C7
VDD_N
VDD_RF
A1
B4
VSS_ANA1
C1
GPIO_10
B2
GPIO_11
B3
GPIO_16
GPIO_8
C3
GPIO_9
B1
F7
HOST_WAKEUP
LP_CLK
G3
D2
PCM_A
PCM_B
E1
PCM_CLK
D1
PCM_SYNC
C2
REF_CLK_IN
D6
D3
RESET_N
RFN
A4
A3
RFP
TOUT_IN_QP
B5
E5
AF_PRG
C5
BT_WAKEUP
E6
CLK_REQ_IN_1
G6
CLK_REQ_IN_2
CLK_REQ_OUT2
G7
CLK_REQ_OUT_1
C4
E2
CONFIG_1
CONFIG_2
F1
F2
CONFIG_3
GPIO_0
D5
STLC2500C
U101
C111
100p
C105
VSS_BT_RF
0.1u
0
R118
0.1u
C109
C113
0.22u
0.22u
C108
0.22u
C110
VSS_BT_ANA
C106
C112
0.1u
0.22u
0.22u
VSS_BT_RF
VSS_BT_ANA
VSS_BT_RF
C107
NA
L100
NA
R124
0
L101
BP1
5
BP2
4
2
BP_DC
G1
3
G2
6
U_BP
1
R119
DNI
VDDK_2V75
FL100
DEA212450BT-7043C1
VSS_BT_RF
VDDE_1V8
VDDE_1V8
FEED
GND1
GND2
VSS_BT_ANA
BT_CLK
VSS_BT_RF
ANT100 AMAA802012LG09
ACC_PCM_SYNC
ACC_PCM_ULD
ACC_GP14_BT_SPI_INT
RESOUT2_n
ACC_GP25_BT_SPI_DAT1
ACC_GP26_BT_SPI_CLK
ACC_PCM_DLD
ACC_PCM_CLK
BT_CLKREQ_n
RTCCLK
ACC_GP23_BT_SPI_CS0n
ACC_GP24_BT_SPI_DAT0
Figure 3-1-11. Schematic of STLC2500C
Z3X-BOX.COM
Содержание KT520
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