LG INFINIA 47LE8500, Руководство по обслуживанию

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- 14 - LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
D-sub RGB
HDMI 1
CVBS, L/R
DDR2 (1Gbit)
NAND Flash
(512MB)
Digita
l A
udio
(Optic
)
USB
Digital AMP
NT
P7000
RS-232C (Ctrl./SVC)
4x1
HDMI Sw
itch
T
D
A
9996
I2S
NVRAM
RGB/
H/
V
DDR_Dat
a
[0
:31]
,
DQS,
DM …
MICOM
(uPD78F
013)
MAX3232
BCM355
6
D
a
ta
[0 … 7]
TS_ Paralle
l
SIF TU_CVBS
AV
Compone
nt 1
Y
Pb Pr,
L/R
CVBS, L/R
HDMI4
Addr[0…1], C
S
…
Compone
nt 2
Y
Pb Pr,
L/R
Audio L/R
A
udio L/R
(for
RGB)
HDMI 2 HDMI 3
SPDIF
DP/
D
M/
+5V
RX
/TX
JA
CK PA
CK
at RE
A
R
JA
CK PA
CK
at SIDE
SCL, SDA_3.3V SCL, SDA_3.3V
FRC IC
(M-star)
DDR2
LVDS
Video dec.
T
W
9910
TU_CVBS
CHB IC
(LG1140)
656
8
CLK SOP
Dat
a
X-
tal
27MHz
IR module
IR
IR
Channel Bro
w
s
e
r
부
Main tuner
(NIM,LG3911)
2 RF
In
CI
DDR2 (1Gbit)
DDR2 (1Gbit)
DDR2 (1Gbit)
Buffer
Sub tuner
(NIM,LG3911)
2 RF
In
TS_ Serial
POD2CHIP
(Paralell port)
PKT0
(Serial port)