1-2
INTRODUCTION
- Digital/Analog broadcasting recorder/receiver [HD/SD PERSONAL VIDEO RECORDER & RECEIVER] or
PVR(Personal Video Recorder)-STB(Set-Top Box) receives the ground wave HD Digital broadcasting pro-
gram /Analog NTSC or Cable broadcasting program and saves a video and audio signal at a HDD with a
specific form or offers additional related services..
- Configuration
The PCU is the IBM PPC405GP of the PowerPC series supporting PCI Bus I/F for PVR, and the tuner
receives a digital ground wave and transfers it as a TP signal, transmitting the NTSC signal of the ground
wave/the cable signal and transferring the audio signal to the SIF.
The MPEG Decoder uses the HD-II supporting MP@HL built with the AC-3 Decoder.
The PVR section transforms the TP data of a digital TV signal and an analog audio/video signal into the TP
by using the MPEG-II Encoder and saves only the necessary data to the HDD via the IDE I/F Chip.
Overall configuration
- System section
CPU, Main Memory, MPEG-II Decoder, Flash Memory, and System CPLD.
- MPEG Video/Audio Decoder section
HD-2, Memory, PLL IC, Audio Processor, Audio ADC, and so on.
- PVR section
TPN-II performing PCI I/F and TP De-Mux, Memory, MPEG-II Encoder, IDE I/F Chip, and 120GB HDD.
- Video/Audio input section
CVBS Decoder, and Audio processor
-1394 section
1394 1-Chip supporting D-VHS and MV Camcoder.
- Tuner
It can receive a signal from ATSC/NTSC/Cable, and send a signal from the ATSC as TP, an analog video sig-
nal as NTSC, and an audio signal as SIF.
- Front section
It is located at the front receiving various key inputs from users and displaying the status of a set-top box at
the VFD.
- Power section
It supplies a DC power to Main Digital Board, Front Board, and HDD with the input of AC 110V.
Содержание HCS6000A
Страница 14: ...3 4 Fig 01 X101 3 25MHz CPU Clock Fig 02 IC201 87 37 5MHz PERI Clock Fig 03 X102 3 3 6864MHz UART Clock ...
Страница 25: ...3 15 FIG 02 VCXO 27MHz clock FIG 03 Crystal 27MHz clock FIG 04 H sync signal FIG 05 V sync signal ...
Страница 27: ...3 17 FIG 06 Digital Stream Input to IC400 FIG 07 Interrupt Request Signal on R418 ...
Страница 31: ...3 21 FIG 13 27MHz NTSC encoder pixel clock FIG 14 Composite Output top ...
Страница 35: ...3 25 FIG 05 DVI output at 480i even field FIG 06 DVI output at 480i odd field ...
Страница 37: ...3 27 Fig 01 Data output from R424 Fig 02 3 072MHz clock from R422 Fig 03 48KHz clock from R421 ...
Страница 45: ...CIRCUIT DIAGRAMS 1 CPU SYSTEM MEMORY CIRCUIT DIAGRAM 3 35 3 36 ...
Страница 46: ...3 37 3 38 2 CPU PERI IR IN AUX CTRL CIRCUIT DIAGRAM ...
Страница 47: ...3 39 3 40 3 TERRESTRIAL FRONT_END CIRCUIT DIAGRAM ...
Страница 48: ...3 41 3 42 4 HD2 SDRAM CIRCUIT DIAGRAM ...
Страница 49: ...3 43 3 44 5 DVI TRANSMITTER CIRCUIT DIAGRAM ...
Страница 50: ...6 VDP I F DISPLAY OUTPUT CIRCUIT DIAGRAM 3 45 3 46 ...
Страница 51: ...3 47 3 48 7 NTSC AUDIO PROCESSOR CIRCUIT DIAGRAM ...
Страница 52: ...3 49 3 50 8 POWER REGULATION CIRCUIT DIAGRAM ...
Страница 53: ...3 51 3 52 9 MPI CIRCUIT DIAGRAM ...
Страница 54: ...3 53 3 54 10 PTC CIRCUIT DIAGRAM ...
Страница 55: ...3 55 3 56 11 BACK PLANE CIRCUIT DIAGRAM ...
Страница 56: ...3 57 3 58 PRINTED CIRCUIT DIAGRAMS 1 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS TOP ...
Страница 57: ...3 59 3 60 2 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS BOTTOM ...
Страница 58: ...3 61 3 62 3 MPI PRINTED CIRCUIT DIAGRAM TOP TOP VIEW BOTTOM VIEW ...
Страница 59: ...3 63 3 64 4 PTC PRINTED CIRCUIT DIAGRAM TOP VIEW BOTTOM VIEW ...
Страница 60: ...3 65 3 66 5 BACK PLANE PRINTED CIRCUIT DIAGRAM TOP VIEW BOTTOM VIEW ...