3-41
3-42
2. MEMORY CIRCUIT DIAGRAM
MA0
SF_CS
BA1
DQ[0..15]
DQM[0..1]
MA[0..11]
SCL
SDA
WE#
DCLK
CAS#
RAS#
BA0
3.3V
SF_CK
SF_CS
SF_DO
SF_DI
SDCLK
DQM1
DRAS#
MA5
MA9
DQ0
SDCKE
MA10
DCAS#
DQ9
DCAS#
DBA1
BA1
DRAS#
DQ1
MA8
DCS#
DQ11
DQ15
BA0
MA6
CAS#
SDCKE
MA7
WE#
MA4
DQ3
DQ5
DWE#
MA11
DCLK
RAS#
DBA0
MA1
DQ2
DQ7
MA2
DQ10
DCS#
DQ8
DBA0
SDCLK
DBA1
DQ4
MA3
DWE#
DQM0
DQ14
DQ6
DQ13
DQ12
GND
SF_CK
SF_DI
SF_CS
SF_DO
SD33
SD33
SD33
SD33
SD33
SD33
3.3V
SD33
SD33
SD33
BA1
3
WE#
3
DCLK
3
CAS#
3
RAS#
3
DQM[0..1]
3
SCL
2
SDA
2
DQ[0..15] 3
MA[0..11]
3
BA0
3
3.3V
2,4,7
SF_CK
2
SF_CS
2
SF_DO
2
SF_DI
2
GND
2,4,5,6,7
DRAM
IIC
SDRAM
4Mb/8Mb
S-FLASH
S-FLASH
R315
0
R315
0
C305
0.1uF
C305
0.1uF
R312
0
R312
0
C303
0.1uF
C303
0.1uF
C302
0.1uF
C302
0.1uF
U302
AT25FS040/EN25B80
U302
AT25FS040/EN25B80
CS#
1
DO
2
WP#
3
VSS
4
DI
5
CLK
6
HOLD#
7
VCC
8
R310
NC
R310
NC
R311
10K
R311
10K
R302
10K
R302
10K
RN301
33x4
RN301
33x4
1
8
2
7
3
6
4
5
C309
0.1uF
C309
0.1uF
R314
0
R314
0
L301
FB(50)
L301
FB(50)
1
2
C304
0.1uF
C304
0.1uF
C308
0.1uF
C308
0.1uF
C306
0.1uF
C306
0.1uF
C307
0.1uF
C307
0.1uF
R303
150
R303
150
R307 10K
R307 10K
+
CE301
47uF/10V
+
CE301
47uF/10V
1
2
R301
10K
R301
10K
R313
0
R313
0
U301
HY57V641620
U301
HY57V641620
A0
23
A1
24
A2
25
A3
26
A4
29
A5
30
A6
31
A7
32
A8
33
A9
34
A10/AP
22
A11
35
BA0/A13
20
BA1/A12
21
CLK
38
CKE
37
CS
19
RAS
18
CAS
17
WE
16
DQML
15
DQMH
39
NC1
36
NC2
40
VSS
54
VSS
41
VSS
28
DQ0
2
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
DQ8
42
DQ9
44
DQ10
45
DQ11
47
DQ12
48
DQ13
50
DQ14
51
DQ15
53
VCC
1
VCC
14
VCC
27
VCCQ
3
VCCQ
9
VCCQ
43
VCCQ
49
VSSQ
6
VSSQ
12
VSSQ
46
VSSQ
52
R306
10K
R306
10K
C301
0.1uF
C301
0.1uF
R304
33
R304
33
R305
33
R305
33
03.MEMORY
LG & MALATA
Thursday, December 20, 2007
03.MEMORY
LG & MALATA
Thursday, December 20, 2007
03.MEMORY
LG & MALATA
Thursday, December 20, 2007
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