4-7
PIN NO.
SYMBOL
TYPE
DESCRIPTION
F6
AGND33_1
Analog Ground
Analog Ground
K7
AGND33_2
Analog Ground
Analog Ground
F7
AGND33_3
Analog Ground
Analog Ground
H5
AGND12_1
Analog Ground
Analog Ground
H7
AGND12_2
Analog Ground
Analog Ground
F5
AUX1
Analog I/O
Auxiliary Input. Alternateive Function : Signal Monitoring
K5
AVDD12_1
Analog Power(1.2V)
Power Pin
J4
AVDD12_2
Analog Power(1.2V)
Power Pin
E3
AVDD33_1
Analog Power(3.3V)
Power Pin
J6
AVDD33_3
Analog Power(3.3V)
Power Pin
L4
FECFREQ
3.3V LVTTL I/O,
5V-tolerance,
Slow slew,
2, 4, 6, 8 mA PDR,
75K pull-up (3.3 V)
Frequency selection signal output, or LDD serial interface data
or 12C SDA.
The pin is spike-free at power-on stage.
L3
FECMOD
3.3V LVTTL I/O,
5V-tolerance,
Slow slew,
2, 4, 6, 8 mA PDR,
75K pull-up (0 V)
High frequency modulation mode selection signal output,
or LDO serial interface command enable.
The pin is spike-free at power-on stage.
P3
FEDMO
Analog Output
Disk motor control output. DAC output.
T1
FEEJECT_
3.3V LVTTL I/O,
5V-tolerance,
6 mA driving,
75K pull-up (3.3 V)
Eject/stop key input, active low.
The pin is spike-free at power-on stage.
Alternate function : General IO.
R1
FEFG
3.3V LVTTL I/O,
5V-tolerance,
6 mA PDR,
75K pull-up (3.3 V)
Motor Hall sensor input.
The pin is spike-free at power-on stage.
N1
FEFMO
Analog Output
Feed motor 1 control. DAC output.
M2
FEFMO2
Analog Output
Feed motor 2 control. DAC output.
N3
FEFMO3
Analog I/O
Feed motor 3 control. DAC output.
Alternative Function : Auxiliary servo input.
M3
FEFMO4
Analog I/O
Feed motor 4 control. DAC output.
Alternative Function : Auxiliary servo input.
H4
FOO
Analog Output
Focus servo output.
PDM output of focus servo compensator.
A3
FPDOCD
Analog Input
Laser Power Monitor Input for CD APC / Differential negative
input
C4
FPDODVD
Analog Input
Laser Power Monitor Input for DVD APC / Differential positive
input
L2
FEGAINSW1
Analog Output
Read gain switch 1.
M2
FEGAINSW2
Analog Output
Read gain switch 2.
L1
FEGAINSW3
Analog Output
Read gain switch 3.
R2
FEGIO0
3.3V LVTTL I/O,
5V-tolerance,
2, 4, 6, 8mA PDR,
75K pull-down (0 V)
LDD serial interface data.
The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
Alternate function :
1. Internal monitored signal output
2. General IO
MAJOR IC INTERNAL BLOCK DIAGRAM AND PIN DESCRIPTION
1. IC501 (MT8560)
1-1. Pin Function
Содержание BH4120SN
Страница 56: ...2 47 WAVEFORMS IC501 MT8560 X TAL 27 MHz 1 1 7 8 10 9 1 SYSTEM PART 1 ...
Страница 59: ...2 50 WAVEFORMS H_SDA H_SCL 11 12 5 HDMI PART 12 11 ...
Страница 60: ...2 51 WAVEFORMS HDMI_CLK_N 13 13 12 11 14 HDMI_0_N 14 JK803 ...
Страница 61: ...2 52 ...
Страница 79: ...2 87 2 88 2 MAIN P C BOARD TOP VIEW BOTTOM VIEW ...
Страница 80: ...3 AMP P C BOARD TOP VIEW BOTTOM VIEW 2 89 2 90 ...
Страница 81: ...4 JACK P C BOARD 5 FRONT P C BOARD TOP VIEW BOTTOM VIEW 2 91 2 92 TOP VIEW BOTTOM VIEW ...
Страница 83: ...3 2 ...
Страница 87: ...A800 Front SPK A700 Center SPK A600 Rear SPK 4 SPEAKER SECTION 4 1 FRONT CENTER REAR SPEAKER ...
Страница 88: ...A900 4 2 PASSIVE SUBWOOFER ...
Страница 89: ......
Страница 103: ...4 14 MEMO ...