IC3501
DEV_HDMI_MUX1
IC3302
DEV_HDMI_MUX0
IC12000
D14
HDMI0_TX0N
HDMI0_TX0P
HDMI0_TX1N
HDMI0_TX1P
HDMI0_TX2N
HDMI0_TX2P
HDMI0_TXCN
HDMI0_TXCP
HDMI1_TX0N
HDMI1_TX0P
HDMI1_TX1N
HDMI1_TX1P
HDMI1_TX2N
HDMI1_TX2P
HDMI1_TXCN
HDMI1_TXCP
HDMI0_DDC_DA
HDMI0_DDC_CK
HDMI1_DDC_DA
HDMI1_DDC_CK
M0_DDR_DQ0-
15_D14(16bit)
M0_DDR_DQS0-
1_D14(2bit)
M0_DDR_DM0-
1_D14(2bit)
M0_DDR_DQ16-31_D14(16bit)
M0_DDR_DQS2-3_D14(2bit)
M0_DDR_DM2-3_D14(2bit)
IC12103
DDR3
1G bit
IC12100
DDR3
1G bit
M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1_DDR_DM0-1_D14(2bit)
M1_DDR_DQ0-15_D14(16bit)
M1_DDR_DQS0-1_D14(2bit)
M1_DDR_DM0-1_D14(2bit)
IC12102
DDR3
1G bit
IC12101
DDR3
1G bit
M0_DDR_A0-13_D14(14bit)
M0_DDR_BA0-2_D14(3bit)
M0_DDR_CKE_D14
M0_DDR_ODT_D14
M0_DDR_RASN_D14
M0_DDR_CASN_D14
M0_DDR_WEN_D14
M0_DDR_RESET_N_D14
M1_DDR_A0-13_D14(14bit)
M1_DDR_BA0-2_D14(3bit)
M1_DDR_CKE_D14
M1_DDR_ODT_D14
M1_DDR_RASN_D14
M1_DDR_CASN_D14
M1_DDR_WEN_D14
M1_DDR_RESET_N_D14
M0_D_CLK_D14
M0_D_CLKN_D14
M0_U_CLK_D14
M0_U_CLKN_D14
M1_D_CLK_D14
M1_D_CLKN_D14
M1_U_CLK_D14
M1_U_CLKN_D14
1920x2160@60p
1920x2160@60p
+3.3V
+2.5V
+1.5V
+1.15V
+3.3V
+2.5V
+1.5V
+1.15V
D14 Block Diagram (External)
IC100
H13D
D13_STPO_CLK
D13_STPO_VAL
D13_STPO_DATA
D13_STPO_SOP
D13_STPO_ERR
SOC_SPI0_SCLK
SOC_SPI0_CS0
SOC_SPI0_MOSI
SOC_SPI0_MISO
IC12002
SPI FLASH
4MByte
SPI_SCLK_M
SPI_MOSI_M
SPI_CS_M/
FLASH_WP/
SPI_MISO_M
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 77EG9700
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