- 10 -
Copyright ©
LG Electronics Inc. All rights reserved.
Only for training and service purposes.
Block Diagram
1. Main SoC
MAIN
Audio
AM
P
M1
6+
IF+,
IF
-
OPTIC
LA
N
HDMI1
HDMI 2.
0
EEPROM(NVRAM)
PHY3
_RX0
N
Air/
Cable
TUNE
R
(C/A
)
T2
DEMO
D
(T2/S2
)
USB1
(2.0
)
eMMC
Sub
Mico
m
P_TS
X_TA
L
T2/C/
W/O
AD
X_TA
L
I2S Ou
t
I2C
0
I2C
4
R E A R
YPbP
r
SPDIF
OU
T
ETHERNET
I2C
1
SU
B
ASSY
IR
/ KE
Y
LOGO
LIGHT(Ready)
WIFI/BT
Comb
o
USB_WIFI
CVBS
HDMI3
HDMI 2.
0
USB2
(2.0
)
RS2
32C/HP
HDMI2(ARC)
HDMI
2.0
AV
EPI
3G
/1.5
G
OC
P
OC
P
USB2
.0_2_DM1
USB2
.0_3_DM0
PHY2
_RX0
N
PHY1
_RX0
N
I2C6
SI
F
HDMI4
HDMI 2.
0
PHY0
_RX0
N
PMIC
GA
MMA
IC
CVBS/COM
P
M0
M1
DDR3
512MB*
2
DDR3 256MB*
2
I2C
5
V
x 1 only
I2C2
V
x 1
Содержание 75UJ64 0 Series
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