EPI Tx
Block
LGE 2122
8. Panel Interface Block Diagram
Z_Out
50Pin X 2
PANEL_VCC
(+12V)
PMIC
TPS65178
Level Shift
TPS65198
EPI CH4 +/-
EPI CH5 +/-
EPI CH6 +/-
VCOM_P
VCOM_N
VCOM_LOOP
VCOM
EPI CH1 +/-
EPI CH2 +/-
EPI CH3 +/-
VCOM_DYN
VCOMLFB
VCOMRFB
GM
A
1
/GM
A
3
/G
A
M
9
/GM
A
1
0
/GM
A
1
6
/GM
A
1
8
VDD
VCC
VCC1.8
C
LK
1
_
I~C
LK
6
_
I
GMA4/GMA5/GAM7/GMA12/GMA14/ GMA15
GMA4/GMA5/GAM7/GMA12/GMA14/GMA15
EO
GST
GCLK
MCLK
E
P
I_
L
OCK3
EPI_LOCK6_SOURCE
EPI_LOCK6
H_VDD
TR/
Diode
TR/
Diode
SWP
CTRLP
SWN
CTRLN
VGH
VGL
V
GL
_
I
VGH_EVEN/VGH_ODD
VGH_F/VGH_R
6
6
2
2
2
2
2
2
2
2
6
VST
GI
P
_
RS
T
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 60LN57 Series
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