LG 55LM8600, Руководство по обслуживанию

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* FHD 240Hz T480Hz ( 72LM9500)
4. Block Diagram for High-end models(Back-end)
DDR3 SDRAM
-
1Gbit (x16)
- 800MHz
DDR3 SDRAM
-
1Gbit (x16)
- 800MHz
DDR1_DATA[15:0]
DDR1_A[13:0]/
BA[2:0]/CLK/CKE
DDR0_DATA[15:0]
DDR0_A[14:0] /
BA[2:0]/CLK/CKE
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+2.5V
SPI_DO/CK/CS
SPI_DI
SPI FLASH
(32Mbit)
SPI FLASH
(32Mbit)
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
L/DIM0_VS,
L/DIM0_SCLK/MOSI
DDR3 SDRAM
-
1Gbit (x16)
- 800MHz
DDR3 SDRAM
-
1Gbit (x16)
- 800MHz
FRC-III
(LG1122)
(0x1C, direct
0xB2, in-direct)
XTAL_IN
XTAL_OUT
X-Tal
(24.75Mhz)
LG1121_RESET
8Lane Vx1 HS
Dual-Link HS-LVDS
VL
CD
_P
OW
ER
(+
12V
)
LG
112
1__RESET
I2C_SDA
_S
I2C_S
CL
_S
PMIC
(MAX17139)
PMIC
(MAX17139)
VCC/VDD/
VGH_A/VGL/
HVDD/VCORE
VLCD12V)
I2C_SDA_S
I2C_SCL_S
L/DIM0_VS
L/DIM0_MOSI/SCLK
I2C_SDA_S
I2C_SCL_S
+1.8V
VLCD12V) VLCD12V)
* Epoxy 4Layer 1.2T (206x183mm)
TX_
LOCK
GM
A[
4:
1]
/
G
M
A[14:10]
VCC/
V
D
D
P-
G
A
MMA
IC
–
Ma
ster
1
(B
UF0683
0)
P-
G
A
MMA
IC
–
Ma
ster
1
(B
UF0683
0)
VC
OM
I2C_SDA
_S
I2C_S
CL
_S
VCC/
V
D
D
GM
A_
M
[9
:5
]
/
G
M
A_M[18:15]
P-
G
A
MMA
IC
–
Ma
ster
2
(B
UF0683
0)
P-
G
A
MMA
IC
–
Ma
ster
2
(B
UF0683
0)
I2C_SDA
_S
I2C_S
CL
_S
80
P m
ini
-LV
DS
O
utput
RIGHT
LGE 240Hz
T-Con
(L
G
5812,
0x70
)
OPT
_N
/O
PT_
P/
GS
P/GS
C/
GO
E
VDD/
V
CC
/
H
VDD/
VG
L/
VG
H
/
VC
OM
R
/
G
M
A[18:1]
VC
OM
R
FB
VDD/
V
CC
/
H
VDD/
VG
L/
VG
H
/
VC
OM
/
G
M
A[18:1]
VC
OM
LF
B
TCON
_SDA
TCON
_SC
L
EEPROM
(AT2
4C32D,
32
Kb
it
)
EEPROM
(AT2
4C32D,
32
Kb
it
)
I2C_SDA
_S
I2C_S
CL
_S
80
P m
ini
-LV
DS
O
utput
LEFT
OPT
_N
N
/O
PT
_P
/
SOE/
POL
/
H_CO
N
V
/
GS
C/GO
E
OPT
_N
/
SOE/
POL
H
_C
O
NV
/GS
C/GO
E
HF min
i-LVD
S
(2
-L
in
k)
HF min
i-LVD
S
(2
-L
in
k)
[S]
TCON
_SDA
TCON
_SC
L
[M]
80
P m
ini
-LV
DS
O
utput
RIGHT
LGE 240Hz
T-Con
(L
G
5812,
0x70
)
OPT
_N
/O
PT_
P/
GS
P/GS
C/
GO
E
VDD/
V
CC
/
H
VDD/
VG
L/
VG
H
/
VC
OM
R
/
G
M
A[18:1]
VC
OM
R
FB
VDD/
V
CC
/
H
VDD/
VG
L/
VG
H
/
VC
OM
/ G
M
A[18:1
]
VC
OM
LF
B
TCON
_SDA
TCON
_SC
L
EEPROM
(AT2
4C32D,
32
Kb
it)
EEPROM
(AT2
4C32D,
32
Kb
it)
I2C_SDA
_S
I2C_S
CL
_S
80
P m
ini
-LV
DS
O
utput
LEFT
OPT
_N
N
/O
PT
_P
/
SOE/
POL
/
H_CO
N
V
/
GS
C/GO
E
OPT
_N
/
SOE/
POL
H
_C
O
NV
/GS
C/GO
E
HF min
i-LVD
S
(2
-L
in
k)
HF min
i-LVD
S
(2
-L
in
k)
[S]
TCON
_SDA
TCON
_SC
L
[M]
GM
A[
4:1
] /
G
M
A[14:10]
VCC/
V
D
D
P-
G
A
MMA
IC
–
Ma
ster
1
(B
UF0683
0)
P-
G
A
MMA
IC
–
Ma
ster
1
(B
UF0683
0)
VC
OM
I2C_SDA
_S
I2C_S
CL
_S
VCC/
V
D
D
GM
A_
M
[9
:5
] /
G
M
A_M[18:15]
P-
G
A
MMA
IC
–
Ma
ster
2
(B
UF0683
0)
P-
G
A
MMA
IC
–
Ma
ster
2
(B
UF0683
0)
I2C_SDA
_S
I2C_S
CL
_S
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+1.5V
+3.3V
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
VLCD12V)
PMIC
(MAX17139)
PMIC
(MAX17139)
VCC/VDD/
VGH_A/VGL/
HVDD/VCORE
VLCD12V)
I2C_SDA_S
I2C_SCL_S
+0.9V
DC-DC Con
(AOZ1038PI)
DC-DC Con
(AOZ1038PI)
VLCD12V)
DC-DC Con
(TPS54327)
DC-DC Con
(TPS54327)
+1.8V
VLCD12V)
VLCD12V)
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
Vx1
Rep
I2C HUB
(PCA9516)
I2C HUB
(PCA9516)
I2C_EN_M
I2C_EN_S
I2C_SDA_1
I2C_SCL_1
I2C_SDA_2
I2C_SCL_2
I2C_SDA_S
I2C_SCL_S
8Lane Vx1 HS 8Lane Vx1 HS
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Only for training and service purposes
LGE Internal Use Only