4. Tuner Block Diagram
4. Tuner Block Diagram
Tuner
[+3.3V_TUNER] 1, 11
+3.3V_TU
IC101
M14
AP6 [SCL3]
AR6 [SDA3]
I2C_SCL4
I2C SDA4
1 5K Ω
+3.3V_TU
M14
AJ5 [GPIO22]
AG23[SCL5]
AH24 [SDA5]
[SLC] 6
[SDA] 6
IC2_SCL6
IC2_SDA6
I2C_SDA4
33Ω
1.5K Ω
[S_RESET] 25
AG17 [GPIO6]
/S2_RESET
6dB TR AMP
AK29 [AAD ADC OUT]
[M_DIF_P] 6
AK28 [DMD_ADC_INP]
IF_P
IF N
LPF
LPF
6dB TR AMP
AK27 [DMD_DAC_OUT]
AL27 [CVBS_IN1]
AK29 [AAD_ADC_OUT]
AL30 [DMD_SIF_OUT]
SoC_CVBS_OUT
DMD_SIF_OUT
[M_DIF_N] 7
S_SIF 9
S_CVBS 8
AL28 [DMD_ADC_INN]
AK29[DMD_ADC_SIF]
AL27[CVBS_IN1]
AM29[IFAGC]
IF_N
TUNER_SIF(for T2/C/S)
TU_CVBS(for T2/C/S)
IF_AGC
M_DIF_IFAGC 3
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
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