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THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0
.0
4
7
u
F
C
42
2
D1.8V
0
READY
R400
DDR01_BA0
10uF
10V
C405
2
2
u
F
C
45
5
DDR01_A[7-13]
DDR1_DQ[8-15]
004:B3
4
7
0
p
F
C
46
0
0.1uF
C471
DDR0_DM1
004:B4
DDR1_DM1
004:B4
BD35331F-E2
IC400
3
VTTS
2
EN
4
VREF
1
GND
5
VDDQ
6
VCC
7
VTT_IN
8
VTT
DDR01_BA2
0.1uF
16V
C409
DDR01_WEb
DDR0_CLK
004:B1;004:C1
0
.1
u
F
C
43
2
DDR0_DQS0
004:B4
75
R418
0
R401
DDR1_DQ[0-7]
004:B3
DDR1_DQS0 004:G2
DDR1_CLKb
004:B1;004:F4
DDR1_DQS0b
004:B4
0.1uF
C472
DDR01_RASb
DDR1_DQ[0-15]
4
7
0
p
F
C
41
2
c a p _ c r a c k
DDR01_A[0-3,7-13]
4
7
0
p
F
C
42
1
0.1uF
C475
0.1uF
C450
75
R425
DDR01_BA0
470pF
C449
0.1uF
C476
DDR01_CKE
DDR0_A[4-6]
0.1uF
16V
C408
4
7
0
p
F
C
43
4
DDR0_DQ[0-7] 004:B3
DDR1_DQS1b 004:G4
DDR0_DQS1b 004:E4
DDR0_A[4-6]
DDR01_ODT
D1.8V
0.1uF
C452
DDR01_BA2
DDR0_DQS1b
004:B4
75
R420
+3.3V_ST
DDR1_A[4-6]
0.1uF
C402
75
R415
DDR0_VREF0
DDR01_A[0-3]
DDR01_CKE
DDR0_DQS0 004:E2
DDR1_VREF0
DDR_VTT
DDR0_DQ[8-15]
4
7
0
p
F
C
41
5
75
R421
100
1%
R411
0.1uF
C401
4
7
0
p
F
C
41
1
c a p _ c r a c k
DDR01_BA2
DDR0_A[4-6]
DDR01_WEb
DDR0_DQ[0-15]
DDR01_WEb
DDR0_DM0
004:B3
DDR01_BA0
DDR01_RASb
DDR01_BA0
DDR01_CASb
DDR1_DQS0b 004:G2
DDR01_BA1
DDR0_DQS1 004:E4
DDR0_VREF0
75
R423
0.1uF
16V
C407
DDR1_VREF0
DDR1_A[4-6]
4
7
0
p
F
C
44
3
DDR01_WEb
0
.0
4
7
u
F
C
45
9
0
.0
4
7
u
F
C
44
4
DDR1_DM0
004:B4
1
0
u
F
C
46
1
DDR1_CLK
004:E1;004:F4
DDR1_CLKb
DDR01_RASb
DDR01_RASb
0
.1
u
F
C
42
7
DDR0_CLKb
004:C1;004:C4
DDR01_RASb
4
7
0
p
F
C
44
7
4
7
0
p
F
C
46
7
DDR01_BA0
DDR0_A[4-6]
DDR01_RASb
DDR1_DQS1b
004:B4
0
.1
u
F
C
45
3
DDR0_CLK
004:C1;004:C4
1
0
u
F
C
43
1
0.1uF
C400
0
.0
4
7
u
F
C
46
3
240
1%
R402
0.1uF
C403
4
7
0
p
F
C
42
5
DDR1_CLK
75
R416
1
0
u
F
C
44
6
D1.8V
DDR01_CKE
0.1uF
C440
DDR0_VREF0
75
R413
DDR01_BA2
470pF
C451
DDR01_A[0-3,7-13]
DDR0_DM0
004:E2
DDR01_RASb
DDR01_CKE
75
R419
1
0
u
F
C
43
5
75
R422
DDR01_BA1
75
R414
0
.1
u
F
C
43
6
DDR01_WEb
DDR0_VREF0
DDR0_DQS1
004:B4
DDR01_A[0-3,7-13]
0
.1
u
F
C
42
3
DDR01_BA2
D1.8V
4
7
0
p
F
C
41
6
0
.0
4
7
u
F
C
42
6
1
0
u
F
C
45
4
DDR01_ODT
004:B1;004:C3;004:C5;004:F5;004:H3;004:H2
DDR01_BA1
1
0
u
F
C
42
9
75
R424
DDR01_A[0-3,7-13]
1
0
u
F
C
42
4
470pF
C441
DDR1_CLKb
004:E1;004:F4
DDR01_CASb
470pF
C439
DDR1_VREF0
0
.0
4
7
u
F
C
43
3
DDR01_BA0
DDR01_A[0-3,7-13]
DDR1_DQS0
004:B4
DDR01_CASb
1
0
u
F
C
45
7
0
.1
u
F
C
45
8
DDR01_BA2
DDR01_ODT
2
2
u
F
C
42
8
DDR01_CASb
D1.8V
DDR01_BA1
DDR01_WEb
DDR01_BA1
DDR1_A[4-6]
004:B2;004:E4;004:H1
DDR0_CLKb
004:B1;004:C4
DDR0_DQS0b
004:B4
DDR01_BA0
DDR01_WEb
D1.8V
DDR1_DQS1 004:G4
0.1uF
C438
0.1uF
C473
DDR0_CLK
004:B1;004:C4
75
R412
100uF
16V
C404
0.1uF
C474
0
.0
4
7
u
F
C
44
8
4
7
0
p
F
C
44
2
0.1uF
16V
C406
DDR0_DQS0b 004:E2
DDR01_ODT
DDR1_DM0
004:G2
0
.1
u
F
C
44
5
DDR_VTT
DDR01_CKE
004:B1;004:C1;004:E1;004:F4;004:H3;004:H2
2
2
u
F
C
45
6
DDR1_VREF0
DDR01_BA1
2
2
u
F
C
43
0
D1.8V
DDR0_CLKb
004:B1;004:C1
DDR01_ODT
DDR0_DM1
004:E4
DDR01_BA1
DDR1_DQS1
004:B4
75
R417
DDR01_ODT
0
.1
u
F
C
46
2
DDR01_CASb
DDR1_DM1
004:G4
DDR1_A[4-6]
004:B2;004:E2;004:H1
DDR01_CASb
DDR1_CLK
004:B1;004:F4
100
1%
R410
DDR01_ODT
D1.8V
DDR01_BA2
DDR_VTT
0
.0
4
7
u
F
C
43
7
1
u
F
C
41
0
c a p _ c r a c k
1
u
F
C
41
3
1
u
F
C
41
4
1
u
F
C
41
7
0.1uF
16V
C420
10K
R408
220
R409
BLM18PG121SN1D
L400
BLM18PG121SN1D
L401
10uF
16V
C418
2.2uF
C419
READY
NT5TU128M8DE_BD
IC401
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J 2
A4
J 8
A5
J 3
A6
J 7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J 1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
NT5TU128M8DE_BD
IC403
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J 2
A4
J 8
A5
J 3
A6
J 7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J 1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
NT5TU128M8DE_BD
IC404
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J 2
A4
J 8
A5
J 3
A6
J 7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J 1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
NT5TU128M8DE_BD
IC402
CK
E8
CK
F8
CKE
F2
RAS
F7
CAS
G7
WE
F3
CS
G8
BA0
G2
BA1
G3
A0
H8
A1
H3
A2
H7
A3
J 2
A4
J 8
A5
J 3
A6
J 7
A7
K2
A8
K8
A9
K3
A10/AP
H2
A11
K7
A12
L2
NC_1/BA2
G1
NC_2/A14
L3
NC_3/A15
L7
A13
L8
ODT
F9
DQ0
C8
DQ1
C2
DQ2
D7
DQ3
D3
DQ4
D1
DQ5
D9
DQ6
B1
DQ7
B9
DQS
B7
DQS
A8
DM/RDQS
B3
NU/RDQS
A2
VDDQ_1
A9
VDDQ_2
C1
VDDQ_3
C3
VDDQ_4
C7
VDDQ_5
C9
VDD_1
A1
VDD_2
L1
VDD_3
E9
VDD_4
H9
VSSQ_1
A7
VSSQ_2
B2
VSSQ_3
B8
VSSQ_4
D2
VSSQ_5
D8
VSS_1
A3
VSS_2
E3
VSS_3
J 1
VSS_4
K9
VREF
E2
VDDL
E1
VSSDL
E7
22uF
16V
C477
DDR_BVDD0
A6
DDR_BVDD1
A24
DDR_BVSS0
B7
DDR_BVSS1
B24
DDR_PLL_TEST
F20
DDR_PLL_LDO
B23
DDR01_CKE
B17
DDR_COMP
C22
DDR01_ODT
E16
DDR_EXT_CLK
C23
DDR0_CLK
B12
DDR0_CLKB
C12
DDR1_CLK
A13
DDR1_CLKB
A12
DDR01_A00
B15
DDR01_A01
E14
DDR01_A02
A15
DDR01_A03
D15
DDR0_A04
E13
DDR0_A05
E12
DDR0_A06
F13
DDR01_A07
C14
DDR01_A08
F14
DDR01_A09
B14
DDR01_A10
D14
DDR01_A11
C13
DDR01_A12
D13
DDR01_A13
B13
DDR1_A04
F15
DDR1_A05
C15
DDR1_A06
D16
DDR01_BA0
F16
DDR01_BA1
B16
DDR01_BA2
E15
DDR01_CASB
A17
DDR0_DQ00
A8
DDR0_DQ01
B11
DDR0_DQ02
B8
DDR0_DQ03
D11
DDR0_DQ04
E11
DDR0_DQ05
C8
DDR0_DQ06
C11
DDR0_DQ07
C9
DDR0_DQ08
D8
DDR0_DQ09
E10
DDR0_DQ10
E9
DDR0_DQ11
F11
DDR0_DQ12
F12
DDR0_DQ13
E8
DDR0_DQ14
D10
DDR0_DQ15
F8
DDR1_DQ00
C18
DDR1_DQ01
C20
DDR1_DQ02
A18
DDR1_DQ03
B21
DDR1_DQ04
C21
DDR1_DQ05
B18
DDR1_DQ06
B20
DDR1_DQ07
D18
DDR1_DQ08
E18
DDR1_DQ09
D21
DDR1_DQ10
F18
DDR1_DQ11
E20
DDR1_DQ12
A22
DDR1_DQ13
F17
DDR1_DQ14
B22
DDR1_DQ15
E17
DDR0_DM0
A10
DDR0_DM1
C10
DDR1_DM0
A20
DDR1_DM1
F19
DDR0_DQS0
B10
DDR0_DQS0B
B9
DDR0_DQS1
F10
DDR0_DQS1B
F9
DDR1_DQS0
B19
DDR1_DQS0B
C19
DDR1_DQS1
E19
DDR1_DQS1B
D19
DDR01_RASB
C16
DDR_VREF0
A7
DDR_VREF1
A23
DDR01_WEB
C17
DDR_VDDP1P8_1
C7
DDR_VDDP1P8_2
D22
0.1uF
C468
0.1uF
C470
0.1uF
C466
0.1uF
C469
0.1uF
C464
0.1uF
C465
DDR01_CKE
DDR01_CKE
0.1uF
C478
0.1uF
C479
0.1uF
C480
1M
R404
R
EA
D
Y
10uF
10V
C481
2.2uF
10V
C482
10uF
10V
C483
0.1uF
16V
C484
0.1uF
16V
C485
c a p _ c r a c k
0.1uF
16V
C486
DDR01_A[13]
DDR01_A[10]
DDR0_DQ[0]
DDR01_A[11]
DDR1_DQ[8]
DDR1_A[5]
DDR01_A[11]
DDR1_A[5]
DDR01_A[12]
DDR01_A[11]
DDR1_A[4]
DDR0_A[4]
DDR01_A[13]
DDR01_A[10]
DDR0_A[5]
DDR1_A[6]
DDR0_DQ[1]
DDR01_A[12]
DDR1_A[6]
DDR01_A[12]
DDR0_DQ[13]
DDR1_A[5]
DDR1_DQ[10]
DDR01_A[10]
DDR01_A[7]
DDR01_A[3]
DDR01_A[7]
DDR01_A[3]
DDR01_A[1]
DDR01_A[3]
DDR01_A[7]
DDR0_DQ[15]
DDR1_DQ[14]
DDR01_A[10]
DDR01_A[0]
DDR01_A[13]
DDR01_A[7]
DDR01_A[7]
DDR1_A[4]
DDR01_A[13]
DDR1_DQ[11]
DDR01_A[12]
DDR01_A[2]
DDR01_A[1]
DDR01_A[9]
DDR1_A[4]
DDR01_A[2]
DDR1_DQ[12]
DDR01_A[9]
DDR01_A[11]
DDR1_DQ[3]
DDR0_A[4]
DDR01_A[8]
DDR01_A[0]
DDR01_A[2]
DDR01_A[8]
DDR01_A[8]
DDR01_A[8]
DDR1_DQ[6]
DDR01_A[2]
DDR0_A[4]
DDR1_A[6]
DDR01_A[13]
DDR01_A[1]
DDR0_DQ[5]
DDR01_A[11]
DDR1_DQ[2]
DDR0_DQ[10]
DDR01_A[0]
DDR0_DQ[3]
DDR0_A[5]
DDR01_A[2]
DDR1_DQ[13]
DDR01_A[7]
DDR01_A[11]
DDR1_DQ[4]
DDR01_A[12]
DDR0_A[6]
DDR1_DQ[5]
DDR01_A[3]
DDR01_A[7]
DDR01_A[11]
DDR0_DQ[11]
DDR0_DQ[4]
DDR01_A[9]
DDR01_A[3]
DDR1_DQ[0]
DDR01_A[13]
DDR01_A[0]
DDR01_A[9]
DDR01_A[0]
DDR1_A[4]
DDR1_DQ[9]
DDR01_A[9]
DDR0_DQ[7]
DDR01_A[9]
DDR01_A[10]
DDR01_A[12]
DDR01_A[1]
DDR0_DQ[12]
DDR0_A[6]
DDR1_A[5]
DDR01_A[8]
DDR01_A[10]
DDR1_DQ[1]
DDR0_DQ[14]
DDR01_A[1]
DDR0_A[5]
DDR1_DQ[15]
DDR01_A[12]
DDR0_DQ[2]
DDR01_A[3]
DDR01_A[8]
DDR0_A[6]
DDR01_A[10]
DDR0_DQ[8]
DDR01_A[2]
DDR0_DQ[6]
DDR0_A[6]
DDR0_A[5]
DDR01_A[8]
DDR01_A[0]
DDR01_A[9]
DDR1_DQ[7]
DDR1_A[6]
DDR0_DQ[9]
DDR01_A[1]
DDR0_A[4]
DDR01_A[3]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR0_DQ[15]
DDR0_DQ[14]
DDR0_DQ[13]
DDR0_DQ[12]
DDR0_DQ[11]
DDR0_DQ[10]
DDR0_DQ[9]
DDR0_DQ[8]
DDR0_DQ[7]
DDR0_DQ[6]
DDR0_DQ[5]
DDR0_DQ[4]
DDR0_DQ[3]
DDR0_DQ[2]
DDR0_DQ[1]
DDR0_DQ[0]
DDR1_DQ[15]
DDR1_DQ[0]
DDR1_DQ[1]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[4]
DDR1_DQ[5]
DDR1_DQ[6]
DDR1_DQ[7]
DDR1_DQ[8]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[12]
DDR1_DQ[13]
DDR1_DQ[14]
DDR01_A[13]
4 1 3
C l o s e t o I C
C l o s e t o I C
C l o s e t o I C
C l o s e t o I C
S I
S I
S I
S I
0 8 / 0 6 / x x
DDR2 MEMORY INTERFACE
BCM AUS DVR
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 50PK550
Страница 28: ......
Страница 32: ...Customer Oriented R D Breakthrough 10년 GP2 BR Chassis SYS_RESET 43 2ms OK A2 5V D1 2V D1 8V SYS_RESET ...
Страница 34: ...Customer Oriented R D Breakthrough 10년 GP2 BR PDP Audio amp reset spec On power up reset be held low 222ms 100 ...
Страница 38: ...Customer Oriented R D Breakthrough GPIO Structure ...
Страница 39: ...Customer Oriented R D Breakthrough GPIO Structure ...
Страница 40: ...Customer Oriented R D Breakthrough GPIO Structure ...
Страница 46: ...Customer Oriented R D Breakthrough No OSD Trouble Shooting Module Power Sequence ...