유첨
. B0 Block Diagram (Features)
2D Graphic Engine
(w/ StretchBLT)
CPU
System
Demux
USB
2
.0
x
3
Channel
Browser II
Dual Full HD Display Engine
DVR Engine
Clear Voice II
Perceptual
Volume Control
Slim SPK
DivX
Sound DSP
Video Decoder
Multi-STD
HD Decoder
Audio DSP
Multi-STD
Audio Decoder
400MHz
Video Encoder
HD up to 720p
DDR3 Controller
TMDS
(1 Ch)
CVBS
(
6
Ch)
Audio L/R
(5 Ch)
SIF(1 Ch)
HS
-LVD
S
Tx
1CH
Audio
ADC
24b@48KHz
TP In(P)
DVB-CI/CI+
Digital
Audio
Output
Headphone
SPIDF
I2S
CVBS
DAC
CVBS Output
(pin sharing
w/ SCART out)
CVBS-Out
SCART
Analog
Video
Decoder
Video
3CH ADC
(11b@165MHz)
CVBS
Encoder
AXI Bus
AX
I B
us
Global DTV
Demodulator
(VSB/ClearQAM,
DVB-T/C)
DVB-C PLL
Xtal
Clock
(24MHz)
Sw
itch
Sw
itch
Sw
itch
Line-Out
SCART
Component
Audio
DAC
HP AMP
I2S
DDR3
DDR3
DDR3
16
16
16
eMMC
RMII
PHY
USB2.0x3
DTV IF
GBB AFE
10b@30MHz
UART
x
3
I2Cx
9
SP
Ix2
G
P
IOx
60
Ethernet
MAC
SC
I
eMMC/
SDIO
DMA
Cx
8
VIC
8K
B S
R
AM
Timer
W
atc
hdog
Capture
Block
w/
LLPLL
CVBS AFE
12b@54MHz
Analog Audio AFE
10b@81MHz
Video Buffer
Analog
Audio
Decoder
Mux & HS-LVDS(x2)
Mux
ARM Cortex-A9
Dual 1GHz
w/ Dual NEON
32KB I$ 32KB D$
1MB L2 $
DDR PLL
(x2)
DCO
SPLL
DPLL
CPU PLL
DDR3 PHY
8
SCART Out
Line Out
I2S
Encoder
Bluetooth
Audio
DAC
Audio
DAC
SCART Out
CHB ADC
CVBS(CHB)
Analog Video Decoder
TS In(CHB)
Micom
IR
Keypad
DDR3 Controller
DDR3 PHY
DDR3 Controller
DDR3 PHY
Tr
ustZon
e
Dual HD
Video Decoder
Multi-STD
HD Decoder
NR(R)
IPC(R)
Scaler (R)
PQ(R)
NR(L)
IPC(L)
Scaler (L)
PQ(L)
3D GPU
Mali-400
Quad-Core
@400MHz
HW Image Codec
(JPEG Enc/Dec,
PNG Dec)
HS
-LVD
S
Tx
FHD
FHD
OSD/
PIP
HDMI
Rx 1.4
(PHY)
HDMI
Rx 1.4
(Link)
NANDC (EC
C)
HDMI
SW
I2S
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Содержание 50GA6400
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