LG 26LC7D Series, Руководство по обслуживанию

Страница: 18 / 43

BLOCK DIAGRAM
- 18 -
HD2_DAC_LRCLK
HD2_ICE958_IN
HD2_DAC_SCLK
H
Y
57
V
1
61
61
0
SI
F
MS
P
4450
PA
L
Tu
n
e
r
(T
A
U
M
-W
1
0
1
P
)
CO
FDM
D
E
M
.+
DV
B
T
u
n
e
r
(T
D
F
B-
Z
2
0
5
P
)
CV
B
S
Y,
C
IIC4
IIC1
99
D
a
ta
[0
:7
],
V
H
_
T
P
_
C
L
K
VA
L
ID
EE
P
R
O
M
(A
T
2
4
C
5
1
2
)
IIC2
SD
R
AM
(
4
E
A)
(H
Y
57
V
64
16
20
B
)
SD
R
AM
(
4
E
A)
(H
Y
57
V
64
16
20
B
)
Si
d
e
A
V
V,
L
R
3
Si
d
e
A
V
V,
L
R
33
Re
a
r A
V
V,
L
R
3
Re
a
r A
V
V,
L
R
33
Re
a
r S
YC
2
Re
a
r S
YC
22
MN
T_
O
u
t
V
1
V
11
MS
P
4
4
5
0
Ex
t A
L
R
22
TP/
D
1
99
YC
b
C
r
H,
V
,C
L
K
FI
D
30
YC
b
C
r
2020
H,
V
,C
L
K
33
Y/
U
/
V
IIC3
Re
s
e
t
1010
T
P
[0
:7
],
TP
_
C
L
K
,
TP
_
v
a
li
d
CP
U
A
R
M
(S
3
C
4
4
B0
X
)
X-t
a
l
(1
0
M
)
I2
C
H
u
b
(P
C
A
95
16
)
IIC1 IIC2 IIC3 IIC4 IIC1 IIC2 IIC3 IIC4 IIC1 IIC2 IIC3 IIC4
KI
A
7
0
2
9
74
H
C
14D
Re
s
e
t
SD
R
A
M
(
2
EA
)
(H
Y
5
7
V
64
16
20
B
)
SD
R
A
M
(
2
EA
)
(H
Y
5
7
V
64
16
20
B
)
FLAS
H
(
2
E
A
)
(A
T
49B
V
160)
FLAS
H
(
2
E
A
)
(A
T
49B
V
160)
A/
V
S
W
(C
X
A
2069Q )
V1
SU
B
(V
/
Y
O
U
T
2
)
VO
U
T
3
OU
T
1
Y1
/
C
1
IN3
HD
-
2
.4
-T
P
D
e-
M
u
x
-M
P
E
G
D
e
c
o
d
in
g
:
MP
@H
L
-F
o
rm
a
t C
o
n
v
e
rt
e
r
-H
o
s
t I/
F
,
M
e
m
o
ry
I/
F
-D
ig
it
al
I
/
F
-Vi
d
e
o
D
A
C
,
N
T
S
C
En
c
o
d
e
r
-A
C
-3
D
e
c
o
d
e
r/
SPD
IF
In
/
o
u
t
-I
E
P
2
SP
D
IF
Ou
t
SPD IF
In
SPD I
FO ut
SD
R
A
M
I
/
F
Te
x
t
De
c
o
d
e
r
(S
D
A
6
001
)
EP
L
D
1
(X
C
951
44
X
L
)
C
o
n
tr
o
l GP
IO
Pe
ri
p
h
e
ra
l
Bu
s
S
PI
D
IF
_
IN
_
B
Y
PASS
88
2
RX
[
0
:2
]–
,RX
C
–
DD
C(
I2
C) EEP
R
O
M
(A
T
2
4C
02N
)
33 YC
b
C
r
Vi
d
e
o
S
W
(C
X
A
2181Q
)
RG
B
-D
T
V
/-
P
C
5
RG
B
H
V
Co
m
p
_
1
YC
b
C
r
33
Co
m
p
_
2
YC
b
C
r
33
EP
L
D
1
(X
C
95144X
L
)
DV
I_
H
,V
,DE
FID
33
OR
3
IIC3
SI
F
PA
L
Tu
n
e
r
Ex
t A
L/
R
22
C
X
A
2069
Co
m
p
_
1
22
L/
R
Co
m
p
_
2
22
L/
R
So
u
n
d
Pr
o
c
(M
S
P
4450)
I2
S
Ou
t
33
HD
-I
I
HD
-I
I
I2
S
_
In
MN
T_
O
u
t
L/
R
22
RG
B
(P
h
o
n
e
)
22
L/
R
Au
d
io AD
C
(C
S
5331)
PW
M
MOD
U
LA
T
O
R
(N
S
P
2100A
)
I2
S
PWM
A
M
P
(T
A
S
5122)
PWM
A
M
P
(T
A
S
5122)
)
OR
1
OR
2
OR
3
3
OR
4
VC
X
O
27
M
hz
LG
D
P
L
L
(L
G
D
T
1
90
1B)
HD
2
_
V
D
P
C
lk
,
H
D
2_
N
T
2
C
L
K
R
S
-232C
(S
T
3
232)
OR
4
HD
-I
I
DV
B
PAL
RF
SP
L
ITTER
HV
,D
E
RG
B
30
3
DO
u
tC
lk
LV
D
S
T
x
.
(T
H
C
63
L
V
D
1
03
)
TX[
0
:4
]–
TX
C
–
12
LV
D
S
WA
F
E
R
E
EPR
O
M
(A
T
2
4C
02N
)
Bu
ff
er
(M
C
3
3
0
7
8)
CLK
11
OR
1
YC
b
C
r
3030
HD
M
I R
X
& A
D
C
(M
S
T
3
3
6
2
M
)
10
-b
it
HDM
I-S
te
reo
1A
+
1
D
Vi
d
e
o
A
/
D
H
Y
57
V
1
61
61
0
EE
P
R
O
M
(C
A
T
2
4
W
C
)
uC
o
m
(M
T
V
4
1
6
M
)
V4
Th
ro
u
g
h
ou
t
MAIN
(V
/
Y
O
U
T
1
)
SPD
IF
R
x
.
(C
S
8415)
R
X
_
H
DM
I_
S
P
DI
F
II
C
1
X_
ta
l
24
M
hz
2
DDC(
I2
C
)
2
H/
V
X-t
a
l
(2
4.
576
M)
1
TX
T
_
C
V
B
S
2
IIC2
TX
T
R
/
G
/
B
,
F
B
/H
/V
6
1
1
1 3
Pe
ri
p
h
e
ra
l
(F
M
S
6403
)
33
YC
b
C
r
Y/
U
/
V
3
H/
V
22
H,
V
,CL
K
OR
2
3
IIC4
FI
D
II
C
2
1
FI
D
OR
3
HD2_ICE958_OUT
1
IIC4
IIC2
II
C
2
2
HD2
_
S
Y
S
CL
K
1
EP
L
D
1
(X
C
95
288
X
L
)
2
H
D
2
_
S
Y
S
C
LK
,
E
P
LD
_
C
LK
IIC3
II
C
4
1
2 L/
R
S
C
K
/L
R
C
K
/L
R
C
H
3
S
C
K
/L
R
C
K
/L
R
C
H
4
SC
K
/
L
R
C
K
/
LR
C
H
/
M
S
C
K
1
MC
L
K
2
B
SS8
3
Vi
d
e
o
Dec
o
d
e
r
(u
P
D
64
015
)
3D
Y
/
C
S
ep
a
rat
o
r