15-9
LatticeECP2/M sysCONFIG Usage Guide
The following sub-sections break down each configuration mode. For more information on the options for each
mode, see the section below entitled Configuration Options.
SPI Mode
The LatticeECP2/M offers a direct connection to memories that support the SPI Serial Flash standard (see
Table 15-6). By setting the configuration pins, CFG[2:0], to all zeros the LatticeECP2/M will configure from the SPI
interface. The SPI interface supports two configuration topologies:
• One FPGA configured from one SPI Serial Flash
• Multiple FPGAs configured from one SPI Serial Flash
The required boot memory size for each of the ECP2/M device sizes is shown in Table 15-4. The values shown are
for a single LatticeECP2/M device. The size for a dual-boot application would be twice that shown.
Table 15-4. Maximum Configuration Bits - SPI Flash Mode Bitstream File
Table 15-5. Maximum Configuration Bits - Serial and Parallel Mode Bitstream File
Device
Bitstream Size (Mb)
SPI Flash (Mb)
Dual Boot SPI Flash (Mb)
ECP2-6
1.5
2
4 / 8
2
ECP2-12
2.9
4
8
ECP2-20
4.5
8
16
ECP2-35
6.3
8
16
ECP2-50
8.9
16
32
ECP2-70
13.3
16
32
ECP2M-20
5.9
8
16
ECP2M-35
9.8
16
32
ECP2M-50
15.8
16
64
ECP2M-70
19.8
32
64
ECP2M-100
25.6
32
64
1. These values apply for both encrypted and unencrypted bitstream files in the SPI Flash mode except as noted
below.
2. For the LatticeECP2-6 S-Series device, the dual Boot Flash size required is 8 Mb due to the number of sectors
required.
Device
All Modes
Slave Serial Mode
Slave Parallel Mode
Unencrypted Bitstream
Size (Mb)
Encrypted Bitstream
Size (Mb)
Encrypted Bitstream
Size (Mb)
ECP2-6
1.5
2.3
7.5
ECP2-12
2.9
4.3
14.2
ECP2-20
4.5
6.7
22.0
ECP2-35
6.3
9.4
31.2
ECP2-50
8.9
13.4
44.3
ECP2-70
13.3
20.0
66.1
ECP2M-20
5.9
8.9
29.5
ECP2M-35
9.8
14.8
48.9
ECP2M-50
15.8
23.7
78.6
ECP2M-70
19.8
29.7
98.6
ECP2M-100
25.6
38.5
127.6