Lattice CSI2 to Parallel Bridge Board, Руководство пользователя

Страница: 8 / 17

8
CSI2 to Parallel Bridge Board
User’s Guide
Appendix A. Schematic
Index
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
MIPI IMX NANOVESTA REV 2
1. INDEX 2. BLOCK DIAGRAM 3. BOTTOM CONN CONNECTION 4. I2C BYPASS CONNECTION 5. BANK2 & BANK3 6. BANK0 & BANK1 7. REGULATOR CONNECTION 8. LEVEL TRANSLATOR CONNECTION 9. POWER AND DECAPS
Title
v
e
R
r
e
b
m
u
N t
n
e
m
uc
o
D
ezi
S
t
e
e
h
S
:
et
a
D
of
2
>c
o
D
< MIPI_IMX_NANOVESTRA_REV_2
B
19
Thursday, October 25, 2012
Title
v
e
R
r
e
b
m
u
N t
n
e
m
uc
o
D
ezi
S
t
e
e
h
S
:
et
a
D
of
2
>c
o
D
< MIPI_IMX_NANOVESTRA_REV_2
B
19
Thursday, October 25, 2012
Title
v
e
R
r
e
b
m
u
N t
n
e
m
uc
o
D
ezi
S
t
e
e
h
S
:
et
a
D
of
2
>c
o
D
< MIPI_IMX_NANOVESTRA_REV_2
B
19
Thursday, October 25, 2012