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Smart Socket

User Guide

FPGA-UG-02046 Version 1.1

April 2018

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Содержание Smart Socket

Страница 1: ...Smart Socket User Guide FPGA UG 02046 Version 1 1 April 2018...

Страница 2: ...PGA UG 02046 1 1 Contents 1 Introduction 4 2 Features 4 3 Block Diagram 5 4 Board Specifications 6 5 Software Requirements 7 5 1 Generic Programming 7 5 2 Specific Software Requirements for Certain De...

Страница 3: ...12 Figure 5 15 ASC Socket Add External ASC Device 12 Figure 5 16 ASC Socket ASC File Load Menu 13 Figure 5 17 ASC Socket Operation Menu 14 Figure 5 18 Warning 14 Figure 5 19 ASC Socket Warning for Ma...

Страница 4: ...or Smart Socket replaces the legacy Lattice Model 300 and its associated Socket Adapters Smart Socket uses the same JTAG based Lattice Diamond Programmer programming software that is used with Lattice...

Страница 5: ...chX02 have parts with different core supply voltage requirements The Smart Socket board jumper J2 allows you to select between 1 2 V and 3 3 V core supply voltage The selected core supply voltage is i...

Страница 6: ...lders The specifications and information herein are subject to change without notice 6 FPGA UG 02046 1 1 4 Board Specifications The outline dimension is the same for all Smart Socket boards The dimens...

Страница 7: ...downloaded at http www latticesemi com en Products DesignSoftwareAndIP FPGAandLDS LatticeDiamond aspx Smart Socket works with the Lattice Diamond Programmer using only a USB cable Connect the cable f...

Страница 8: ...hown in Figure 5 3 Some device families may not support the scan operation For details see the Software Requirements for Specific Device Families section Figure 5 3 Unable to Identify Device In such c...

Страница 9: ...without notice FPGA UG 02046 1 1 9 4 Select the appropriate programming file by clicking the Browse button in the Programming Options section as shown in Figure 5 6 5 Click OK Figure 5 6 Programming O...

Страница 10: ...ithout notice 10 FPGA UG 02046 1 1 Figure 5 10 shows that the programming of device is in progress Figure 5 10 Programming in Progress 8 When the programming of the device is completed the Status opti...

Страница 11: ...ily Done LED indication is not supported 5 2 2 ECP5 Device Family Programming The programming of ECP5 device family follows steps similar to the process described in the Generic Programming section Wh...

Страница 12: ...ames are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 12 FPGA UG 02046 1 1 Figure 5 14 ASC Socket Devi...

Страница 13: ...mes are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02046 1 1 13 Figure 5 16 ASC Socket ASC F...

Страница 14: ...or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 14 FPGA UG 02046 1 1 Figure 5 17 ASC Socket Operation Menu The warn...

Страница 15: ...greyed out to prevent adding a new file as shown in Figure 5 20 Figure 5 20 ASC Socket Ready to Program Step 8 Program the ASC device through the MachXO2 device on the Smart Socket board by clicking t...

Страница 16: ...amming Completed 5 2 4 iCE40 Device Family Programming To program the iCE40 device 1 Launch the Lattice Diamond Programmer software The scanning of the device fails because the Scan operation is suppo...

Страница 17: ...ut notice FPGA UG 02046 1 1 17 Figure 5 24 iCE40 Family Device Family List 3 Select the programming file to program the iCE40 device by double clicking the Browse button under File Name as shown in Fi...

Страница 18: ...disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein a...

Страница 19: ...gramming To program the CrossLink Device 1 Launch the Lattice Diamond Programmer software The scanning of the device fails as the Scan operation is supported over JTAG interface only and the CrossLink...

Страница 20: ...r respective holders The specifications and information herein are subject to change without notice 20 FPGA UG 02046 1 1 Figure 5 29 CrossLink Family Device Family List 3 Select the programming file t...

Страница 21: ...cations and information herein are subject to change without notice FPGA UG 02046 1 1 21 Figure 5 31 CrossLink Family Program Icon 5 When the programming of the device is completed the Status option c...

Страница 22: ...listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change...

Страница 23: ...e Schematic Rev of Sheet Title Lattice Semiconductor Applications Email techsupport Latticesemi com Board Rev Project September 26 2017 B A 6 2 USB Programming Interface XO2 Programming Board PSSN FT2...

Страница 24: ...pplications Email techsupport Latticesemi com Board Rev Project September 26 2017 B A 6 3 Voltage Regulator and LEDs XO2 Programming Board PSSN FT256 LCMXO2 A Date Size Schematic Rev of Sheet Title La...

Страница 25: ...LK CCLK P6 PB9B PB10B PB13B P7 PB12A PB15A PB18A P8 PB16B PB20B PB23B PCLKC2_1 P9 PB19B PB23B PB29B R10 PB22A PB27A PB35A R11 PB25A PB30A PB38A SN R12 PB22C PB26A PB34A R13 PB25D PB30D PB38D R14 PB3D...

Страница 26: ...PR10A PR14A PR17A DQ1 K14 PR10B PR14B PR17B DQ1 K15 PR9B PR13B PR16B DQS1N K16 PR10D PR14D PR17D L12 PR12D PR16D PR21D L13 PR11B PR15B PR18B DQ1 L14 PR12A PR16A PR21A DQ1 L15 PR11A PR15A PR18A DQ1 L1...

Страница 27: ...mation herein are subject to change without notice FPGA UG 02046 1 1 27 Appendix B Debugging Check the following if the programming fails USB power supply ON OFF switch is turned ON to provide power t...

Страница 28: ...or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 28 FPGA UG 02046 1 1 Ensure that the ON OFF switch is turned to the...

Страница 29: ...f their respective holders The specifications and information herein are subject to change without notice FPGA UG 02046 1 1 29 Revision History Date Version Change Summary April 2018 1 1 Changed docum...

Страница 30: ...7th Floor 111 SW 5th Avenue Portland OR 97204 USA T 503 268 8000 www latticesemi com...

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