Lattice Semiconductor MachXO5-NX Development Kit, Руководство пользователя

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MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
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FPGA-EB-02052-0.90 17
5. MachXO5-25 Clock Sources
The MachXO5-NX Development Board has multiple external clock options for the MachXO5-25 applications as shown in
Figure 5.1
.

12 MHz from U1 (FTDI)

12 MHz from U18 (FTDI)

25 MHz from U7 (SGMII PHY)

27 MHz from X4 (OSC MEM)

125 MHz from X5 (OSC MEM)

External clock source from J10 (SMA)
J8
12MHz
U1
U18
U7
X4
X5
J10
EXT_CLK
125M_OSC_OUT
27M_OSC_OUT
SGMII_CLK_OUT
U12MHz
JP10
R159
JP11
EXPCON_OSC
J11
J19
USB
USB
Clock
Generator
SMA
Figure 5.1. Onboard Clock Resources
You need take care that only 27 MHz and 125 MHz clocks are active in default after board power up. Both 12 MHz
clocks from the FT2232H FTDI U1 and U18 device are not always on without some hardware configuration. 25 MHz of
SGMII and external clock need source from other devices. Refer to Table 5.1 for those clock utilization and enable
conditions.
Table 5.1. Input Clock Options
Clock
Frequency
Net Name
MachXO5-25
Ball Location
Clock
Source
Always
On?
Enable Conditions
12 MHz 12MHZ E16 U1 No
Need add R159 and JP11. USB header J11 connected
with power on.
12 MHz U12MHZ E14 U18 No
Need add JP10. USB header J19 connected with
power on.
25 MHz SGMII_CLK_OUT T7 U7 No Power on. U7 populated and enabled.
27 MHz 27M_OSC B1 X4 Yes Power on. Force 27M_EN high if R161 populated.
125 MHz 125M_OSC V1 X5 Yes Power on. Force 125M_EN high if R232 populated.
Customer EXT_CLK D19 J10 No
Need add J10. Connect to external clock generator
through SMA cable.