LAPIS Semiconductor EASE1000, Руководство пользователя

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EASE1000 User’s Manual
Chapter 2
General Description
2.7 Target System Board Layout
The following shows a recommended board layout of the EASE1000 interface connector in the target system.
1
13 14
2
EASE1000
Target system
Porality slot for
EASE1000 interface cable
Figure 2-9 EASE1000 Interface Connector Recommended Board Layout
Also, design the pin assignment of the EASE1000 interface connector according to the following table.
Table 1 List of EASE1000 Interface Connector Pins
Pin No. EASE1000 pin name Description
1 VTref Target LSI positive power supply
2 Vss Target LSI negative power supply
3 N.C. Unused (This should be left unconnected.)
4 Vss Target LSI negative power supply
5 RST_OUT/SCK Target LSI system reset signal/communication clock
6 Vss Target LSI negative power supply
7 SDATA Target LSI communication data
8 Vss Target LSI negative power supply
9 VDDL Target LSI VDDL supply
10 Vss Target LSI negative power supply
11 N.C. Unused (This should be left unconnected.)
12 Vss Target LSI negative power supply
13 3.3VOUT 3.3V output pin
14 N.C Unused (This should be left unconnected.)
2.7.1 Notes of Target System Board Layout
The following shows the notes of target system board layout
- The length of a cable connecting EASE1000 with the target system (EASE1000 interface cable) is approximately 15
cm. Locate the EASE1000 interface connector at the end of PCB if possible in order to make the cable between the
EASE1000 interface connector and target LSI as short as possible.
(Compatible connector: HIF3FC-14PA-2.54DSA)
- It is recommended that the wiring connected to RST_OUT/SCK and SDATA be shielded with Vss
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