Open-Q 212A Development Kit
Open-Q™ 212A Development Kit User Guide
32
Note
Signal
Pin
#
Pin
#
Signal
Note
PM8916-1
VREG_L5_1P8
31
32 GND
U24 on Carrier
Board
MB_VREG_3P3
33
34 GPIO_XX_MIC_SELECT
APQ GPIO_51
U1 on Carrier Board MB_VREG_5P0
35
36 CDC_LINE_OUT_3
NC
37
38 CDC_LINE_OUT_REF
GND
39
40 CDC_LINE_OUT_4
3.8.13
External Codec/GPIO Expansion Header – J1
J1 allows user to access SLIMBUS, I2S, power rails, and other GPIOs from APQ or PM8916-1 that are not
used by another peripheral on the carrier board. Please refer to the pinout table below for detail.
Figure 15 External Codec/GPIO Expansion Header (J1)
Table 13 External Codec/GPIO Expansion Header J1 Pinout
Description
Signal
Pin
#
Pin
#
Signal
Description
Not Available on
the 212A dev. kit
GPIO_0_BLSP1_SPI_MO
SI
1 2
GND
GND
Not Available on
the 212A dev. kit
GPIO_1_BLSP1_SPI_MI
SO
3 4
PM_GPIO_x_DIV_CLK2 PM8916-1
GPIO_2
BLSP1 bit 1
(APQ GPIO 14)
GPIO_2_BLSP1_SPI_CS
_N
5 6
PM_MPP_3
PM8916-1 Multi-
Purpose Pin 3