CL4790 Hardware Integration Guide
Version 3.0
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www.lairdtech.com/ramp
8
CONN-HIG_CL4790
S
ERIAL
I
NTERFACE
CL4790 Serial Interface
Hardware Flow Control
The CL4790 supports the following protocols, which are separate products:
RS232
RS485
CL4790 Serial Interface
RS232
Figure 2: CL4790-RS232
RS232 is a single-ended data transmission protocol. The RS232 signals are represented by voltage levels with
respect to a system common (power/logic ground). The “idle” state (MARK) has the signal level negative with
respect to common, and the “active” state (SPACE) has the signal level positive with respect to common.
Table 3: CL4790 DB9 Male Connector Pinout (as defined at the CL4790)
DB9 Pin
Signal Name
Description
Direction
1
DCD
Data Carrier Detect
Out
2
TXD (RXD with respect to DTE)
Transmit Data
Data Out to Host
3
RXD (TXD with respect to DTE)
Receive Data
Data In to CL4790
4
DTR
Data Terminal Ready In
5
GND
Ground
-
6
DSR
Data Set Ready
Out
7
RTS
Request to Send
In
8
CTS
Clear to Send
Out
9
RI
Ring Indicator
Out
