![Laird BT800 series Скачать руководство пользователя страница 25](http://html.mh-extra.com/html/laird/bt800-series/bt800-series_hardware-integration-manual_670466025.webp)
BT800 Hardware Integration Guide
Version 0.2
Americas: +1-800-492-2320 Option 2
Europe: +44-1628-858-940
Hong Kong: +852-2923-0610
www.lairdtech.com/bluetooth
25
CONN-GUIDE-BT800_v0_2
Figure 15: Digital Audio Interface Master Timing
10
P
OWER
C
ONTROL AND
R
EGULATION
See the Example Application Schematic for the regulator configuration. BT800 contains 5 regulators:
USB linear regulator, to generate the 3.3 V for the USB interface and the input to the high-voltage
linear regulator.
High-voltage linear regulator, to generate the main 1.8V from the USB linear regulator or an
external 3.3V.
This regulator then feeds the 3 low-voltage regulators:
Low-voltage VDD_DIG linear regulator, a programmable low-voltage regulator to supply a 0.90V
to1.25V digital supply, VDD_DIG.
Low-voltage VDD_ANA linear regulator, to supply the radio supply, VDD_RADIO.
Low-voltage VDD_AUX linear regulator, to supply the auxiliary supply, VDD_AUX.
USB Linear Regulator
10.1
The integrated USB LDO linear regulator is available as a 3.30V supply rail and is intended to supply the
USB interface and the high-voltage linear regulator. The input voltage range is between 4.25V and
5.75V. The maximum current from this regulator is 150mA, of which 50mA is available for external use, for
example EEPROM/LED. Externally decouple the output of this regulator using a low ESR MLC capacitor
to the VREG_IN_HV pin. The regulator operates correctly with an output capacitor of 1µF to 4.7µF
(±20%).
This regulator is enabled by default. If the USB linear regulator is not required, leave its input
(VREG_IN_USB) unconnected.
High-voltage Linear Regulator
10.2
The integrated high-voltage linear regulator is available to power the main 1.8 V supply rail. The input
voltage range is between 2.3 V and 4.8 V. The maximum current from this regulator is 100 mA. Externally
decouple the output of this regulator using a low ESR MLC capacitor of a minimum 1.5 µF to the
VREG_OUT_HV pin. Take VREG_EN_RST# high to enable this regulator. If this regulator is not required then
leave VREG_IN_HV unconnected or tied to VREG_OUT_HV.