3.3.5. E-502 synchronization general principle.
The
shows a simplified block diagram explaining the general device of the
synchronization system in E-502. E-502 synchronization system consists of two parts: primary and
secondary synchronization circuits.
3.3.5.1. Primary synchronization.
The primary synchronization circuit (
I
)
according to the settings selects the corresponding
external or internal source of the reference frequency, as well as the external or internal source of the
start signal. Using the selected signals, circuit
I
generates an internal reference signal
f
ref
as a
sequence of synchronization pulses with a period
t
ref
. Moreover, the beginning of this sequence is
strictly bound by this scheme to the external or internal
start event
, and all I/O equipment is
synchronized (and simultaneously starts) from this sequence: nodes of the ADC (including the logic
of the control table), DAC and digital I/O. These nodes contain the corresponding frequency dividers
f
ref
.
We list all possible options for user settings related to the
selection of sources of reference
frequency signals
:
•
Internal generator 2.0/ 1.5 MHz of this E-502 module (setting by default)
•
The reference frequency from the DI_SYN1 input (on the front or on the drop)
•
The reference frequency from the DI_SYN2 input (on the front or on the drop)
•
The reference frequency from the CONV_IN input from the neighboring E-502, which acts as the
master.
We list all possible options for user settings for selecting
sources of the start event of the E-502
I/O system
:
•
Program start from PC (default setting)
•
On the signal from the input DI_SYN1 (on the front or on the drop)
•
On the signal from the input DI_SYN2 (on the front or on the drop)
•
By the signal from the input START_IN from the neighboring E-502, which acts as the master.
Each E-502 module always translates via its outputs CONV_OUT and START_OUT,
respectively, its internal reference and start signals for one E-502 slave module.
E-502 module can be, at the same time, the master for one or two adjacent modules and the
slave for the other adjacent E-502. Thus, synchronization of several E-502, connected by a chain, as
well as branching from one master to three slaves, is supported. The possible topology of
the synchronization circuits is discussed in detail in sec.
.
The primary synchronization circuit provides synchronization of the frequency and phase of
the ADC, DAC and cycle cycles of the digital input and output system. It is understood that in a multi-
module synchronization system, the user will be able to intelligently set the control tables of different
modules, as well as the division of the reference frequency for the required input-output processes.
!
Note that for the slave E-502 there is a frequency limitation at the input
CONV_IN – no more than 1.5 MHz. Thus, two or more slave E-502 modules
can be synchronized only at a reference frequency of 1.5 MHz from the master.
Stopping the primary synchronization scheme is done only programmatically and
asynchronously.