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Shenzhen KYL Communication Equipment Co., Ltd
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b.
The delay time of transceivers between the first bit sent by TxD to the first
bit received by RxD.
As data processing will be made on user’s data by KYL-220 transceiver using
FEC (Forward Error Correction) or other correction algorithm, when RxD of a
KYL-200L transceiver ‘A’ receives the data, then transmits it, the other one
transceiver ‘B’ will have a delay (ts) to receive and transmit by TxD. Different
RF data rate causes different delay time. Please see the specific delay time
below:
RF Date Rate
(bps)
Delay
Ts(mS)
RF Date Rate
(bps)
Delay
Ts(mS)
1200
90
9600
16
2400
48
19200
10
4800
30
Timing diagram:
c. Error dealing procedure:
To enhance the reliability and stability of user’s systems, a verify bit or a Cyclic
Redundancy Check (CRC) mode is highly recommended to prevent wrong
information while using KYL-220 modules.
d. Large-number data transmission