Event status register
The event status register bits are set when certain events occur during PAT-T operation. All
bits of the event status register are set by the error event queue.
The register is defined by the IEEE488.2 standard and is controlled by the IEEE488.2
common commands
,
.
for the description of the error.
Bit Bit
Wight
Bit Name
Description
Error
Code
0
1
Operation
Complete(OPC)
Set when an *OPC command is received and all
operations in standby are complete.
-800
to
-899
1
2
Request
Control (RQC)
Not used
--
2
4
Query
Error(QYE)
Set when an attempt is made to read data from the
output queue when there is no output or the error queue
is in wait status.
Indicates that there is no data in the error queue.
-400
to
-499
3
8
Device
Dependent
Error(DDE)
Set when there is a device-specific error.
-300
to
-399
100
to
999
4
16
Execution
Error(EXE)
Set when the PAT-T evaluates the program data following
the header is outside the formal input range or does not
match the performance of the PAT-T.
This indicates that a valid SCPI command may not be
executed correctly depending on the conditions of the
PAT-T.
-200
to
-299
5
32
Command
Error(CME)
Set when an IEEE 488.2 syntax error is detected, when
an unidentifiable header is received, or when a group
execution trigger enters the internal IEEE 488.2 SCPI
command input buffer.
-100
to
-199
6
64
Reserved
Not used
--
7
128
Power
ON(PON)
Set when the power is turned on.
--
8-
15
Reserved
Not usedv
--
Overview
Setup
Overview of Messages
Command
(function search)
Protection and Clear the Alarm
Setting Changes using triggers
Command
(ABC search)
Command
(Sub-system search)
Appendix
Tutorial
PAT-T series Communication Interface Manual
KIKUSUI ELECTRONICS CORP.
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