Keysight M9502A, Руководство пользователя

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76 Keysight M9502A/M9505A AXIe Chassis User Guide
Features and Functions Chassis Synchronization and Triggering
Synchronization
Available Clocks
Clock Outputs
The Embedded System Module (ESM) generates a 100 MHz
instrument clock signal from its clock bus. This signal is:
-
Star distributed to all instrument slots as
CLK100
-
Provided to the ESM’s front panel SMA connector
CLOCK OUT
, as a 10 MHz
external reference clock (3.3V CMOS, 50
W
)
- Distributed to additional chassis as
MULTIFRAME OUTPUT CLK100
A separate 100 MHz distributed PCIe fabric reference clock
(
FCLK
)
is provided
from the ESM to all instrument slots.
Clock Sources
There are three possible sources for the clock bus in a given
chassis. Clock detection logic is automatic, and the input source is chosen in the
following priority order, depending on which external inputs are sensed:
1
An external reference clock (
MULTIFRAME INPUT CLK100
) from the lower
chassis connector
2
A 10 MHz external reference clock (
CLOCK IN
) applied at the ESM’s front panel
SMA connector
3
The local 100 MHz clock oscillator within the ESM
Clock Bus Diagram
The clock resources are illustrated below.
If you choose the external 10 MHz reference clock, it must be present at the front
panel SMA connector when the chassis is powered on. If you attach the cable
after power is applied, you must cycle power on the chassis.
CLK100 [5]
FCLK [5]
zero delay
feedback
PLL CLK
100 MHz Local
PLL
LVDS
fan out
buffer
mux x10
Clock Oscillator
3.3V
50
W
PLL
/10
ESM
Front Panel
Chassis
Backplane
100 MHz
CLK Osc.
HCSL
fan out
buffer
Clock Bus
MULTIFRAME INPUT
CLK100
ESM
CLOCK OUT
CLOCK IN
.
MULTIFRAME OUTPUT
CLK100