TM-V708A
10
CIRCUIT DESCRIPTION
4-2. Phase comparator
Part of the VHF VCO output is amplified by Q3 and goes to
VHF PLL IC. Also, a part of the UHF VCO output is amplified
by Q302 and goes to the UHF PLL IC. The pulse-swallow
type PLL IC divides the input VCO oscillator frequency using
the data from the CPU (IC604). It compares its phase with
that of the reference frequency to make the PLL synthesizer
to generate the desired step.
4-3. Lock voltage (VCO control voltage)
The phase differential comparator, output from the PLL IC,
results in a phase difference pulse. This pulse is amplified by
a charge pump (Q1, Q2 or Q300, Q301), the ripples are
removed by a low-pass filter Then the signal is supplied as
the oscillator frequency control voltage for each VCO.
4-4. Unlock detection circuit
When the PLL is unlocked, a low state voltage is outputted
from pin 8 of the PLL IC.
This signal is monitored by the CPU (IC604) to control
transmission/reception switching timing.
5. Power supply circuit
5-1. Microcomputers and peripheral circuits
Reset and backup circuits
The CPU reset signal is generated by detecting a rising
edge of the M5C line voltage with the reset IC (IC601). When
the voltage supplied to the transceiver decreases and the B
line voltage falls below the detection voltage of the voltage
detection circuit (Q604, D604), the CPU (IC604) detects it
through the interrupt pin, stores data in the EEPROM (IC602),
and shuts the power off.
CPU
IC604
DISPLAY
X54-329
Fig. 12 Structure of non-synchronized serial
communication
5-2. Voltage detection processing
The CPU (IC604) monitors and process various voltage
status at IC604 A/D ports.
The squelch voltage is input from the IF IC and a change in
the noise voltage is detected to control squelch. The S meter
voltage is input from the IF IC to control the S meter display.
The thermistor voltage (temperature) and the remote control
microphone key operation are also detected through the A/D
port.
5-3.Serial control
The CPU (IC604) controls the panel unit (X54-329 unit)
through a synchronous serial communication.
6. AF Signal System
6-1. Beep circuit and mute circuit
A beep sound is generated by the CPU (IC604) and goes
to cross point switch (IC702).
This signal is switched by the cross point switch (IC702)
and are input to the electronic volume (IC804). While the
beep signal is output from the microprocessor, audio signals
for each band are muted by the cross point switch (IC702)
with the serial data from the microprocessor (IC604).
The signals output from the electronic volume (IC804) are
input to the speaker switching circuit and go through the
audio mute circuit (Q804 and Q805). Then it is input to the
power amp (IC806).
Fig. 13 Beep circuit and mute circuit
CROSS POINT SW
AO 1
AO 0
CPU
R857
R874
R870
R873
R872
R875
R858
IC 808
IC807
Q804
Q805
MUTE
MUTE
D803
J801
J802
CN800
IC806
POWER AMP
BEEP
DTMF
RAV
RAU
IC702
IC804
IC604
ELECTRONIC
VOLUME
13
8
1
6
1
1
7
7
5
5
6