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(No.RA035<Rev.001>)1-7

[Firmware upgrade in Firmware Programing Mode]

(1) Start up the firmware programming software (Updater).
(2) Set the communications speed (normally, 115200 bps)

and communications port in the configuration item.

(3) Press and hold the [Side2] key while turning the trans-

ceiver power ON. Then, the orange LED turns on.

(4) Press "write" button in the window. When the transceiver

starts to receive data, the orange LED turns to green.

(5) If writing ends successfully, the green LED turns to red.

Note:

• This mode cannot be entered if the Firmware Programming

mode is set to Disable in the Programming software.

• Normally, write in the high-speed mode.

2.3

CIRCUIT DESCRIPTION

2.3.1 Frequency Configuration

The receiver utilizes double conversion. The first IF is 49.95MHz and the second IF is 450kHz. The first Local oscillator is supplied
from the PLL circuit.
The PLL circuit in the transmitter generates the necessary frequencies. Figure 1 shows the frequencies.

Fig.1 Frequency configuration

2.3.2 Receiver System

The receiver system is shown in Figure 2.

Fig.2 Receiver system

2.3.2.1

Front End (RF Amplifier) Circuit

The signal coming from the antenna passes through the transmit/receive switching diode circuit (D201, D202, D203 and D204) and a
BPF (L415 and L416), and is then amplified by the RF amplifier (Q405).
The resulting signal passes through a BPF (L411 and L414) and goes to the mixer. The BPF is adjusted by variable capacitance diodes
(D401, D402, D403 and D404). The input voltage to the variable capacitance diodes is the regulated voltage output from the DC am-
plifier (IC704,IC721).

2.3.2.2

First Mixer

The signal from the front end is mixed with the first local oscillator signal generated in the PLL circuit by Q404 to produce the first IF
frequency of 49.95MHz.
The resulting signal passes through the XF400 MCF to cut the adjacent spurious and provide optimum characteristics, such as adja-
cent frequency selectivity.

2.3.2.3

IF Amplifier Circuit

The first IF signal is passed through a four-pole monolithic crystal filter (XF400) to remove the adjacent channel signal. The filtered
first IF signal is amplified by the first IF amplifier (Q403) and is then applied to the IF system IC (IC400).
The IF system IC provides a second mixer, AGC+BPF, PLL FM detector, noise squelch and RSSI circuit.
The second mixer mixes the first IF signal (49.95MHz) with the signal of the second local oscillator output (Q400) and produces the
second IF signal of 450kHz.
The second IF signal is passed through the internal bandpass filter of the IF system IC to remove the adjacent channel signal. The
filtered second IF signal is amplified by the limiting amplifier and demodulated by the internal discriminator of the IF system IC.
The demodulated signal is routed to the audio circuit.

TX/RX: 136~174MHz

136~174MHz

MCF

MIC

ANT

AMP

System

Tripler

PLL

VCO

50.4MHz

49.95MHz