28
TK-890/
(
B
)
/H
(
B
)
5. VCO/PLL Circuit
The VCO of TK-890 consists of three VCO circuits which
one oscillates the transmit signal with Q305 and the others
do the first local receive signal with two RX-VCO. RX band
range is divided into two range which lower band oscillates
the RX
L
-VCO with Q306 and higher band does the RX
H
-VCO
with Q307.
Each oscillators are switched by turning the source line
for Q308, Q309, Q310, Q311 and Q312 on and off. The
signal output of the VCO is amplified by the buffer amplifier
Q313 and divided into two signals which one is amplified by
Q314 and the other is done by Q315. The signal from Q314
passes through D308 which is transmit/receive switch, is
amplified by Q201, Q204 and Q205, and is output from the
CN203.
The signal from Q315 passes through the low-pass filter
and is applied to IC301 which is PLL frequency synthesizer
with VCXO ; X301. The VCXO of which the frequency stabil-
ity is within 2.0ppm (temperature range of –30 to +60
°
C)
generates 16.8MHz. The PLL-IC consists of three modulus
prescaler, fractional divider, reference divider, digital phase
comparator with charge pump output.
This PLL-IC is Fractional-N type synthesizer and performs
is 40 or 50kHz reference signal which is eighth of the chan-
nel step (5 or 6.25kHz). The input signal from the pins 5 and
8 of the PLL-IC is divided down to the 40 or 50kHz and com-
pared at digital phase comparator.
The pulsed output signal of the digital phase comparator
is applied to the charge pump and transformed into DC sig-
nal. The DC signal from the pin 14 of the PLL-IC passes
through the active low-pass filter (loop filter), is applied to
the VCO and controls to keep the frequency of the VCO.
The serial data (DT, CP, EP) from the microprocessor
IC516 is input to the PLL-IC. And PLL lock condition is al-
ways monitored by the pin 28 (UL) of IC516.
CIRCUIT DESCRIPTION
3. Squelch Circuit
The output from IC101 enters FM IC again, then passed
through a band-pass filter. The noise component output
from IC101 is amplified by Q109 and rectified by D103 to
produce a DC voltage corresponding to the nose level.
The DC voltage is sent to the analog port of the CPU
(IC516/pin 27). And IC101 output a DC voltage (RSSI) corre-
sponding to the input of the IF amplifier. The CPU reads the
RSSI signal via pin 26. IC101 determines whether to output
sounds from the speaker by comparing the input voltage of
pin 27 with the present value.
Only during scan, the RSSI DC voltage is used together
with the noise wave detection pin's DC voltage (pin 27).
SQ voltage
ANT input level
SQ close
SQ open
Preset
value
RSSI voltage
ANT input level
Preset value
Fig. 7
Squelch and RSSI voltage vs ANT input level
4. RX BPF (L101, L104)
The signal’s BPF bandwidth is 20MHz (see the table be-
low)
Destination
Allowable range of
Default setting
market
operation
K : TK-890/(B)
450~490MHz
450~470MHz
K : TK-890H(B)
450~480MHz
450~470MHz
K2 : TK-890(B)
480~512MHz
480~500MHz
K3 : TK-890(B)
403~430MHz
410~430MHz
ex) When using 470~490MHz (TK-890/(B)), 470~480MHz
(TK-890H(B)), tune L101 and L104 as needed while compar-
ing with the chart below. (Refer to Adjustment)
8CL
TX VCO
RX VCO
PLL-IC
IC516
µ
-com
RX VCO
BUFF
AMP
AMP
AMP
SW
SW
SW
SW
LPF
MO
8CL
STR
Q305
Q308
SW
SW
Q309
Q306
Q312
Q311
Q307
SRR
Q310
IC301
DT
CP
UL
Q315
5C
X301
MB
MO
8R
Q313
Q314
D308
TX
RX
EP
TX-RX UNIT
CONTROL UNIT
8C
8T
8CL
8CL
VCXO
5C
5C
9CL
Q303,304
Fig. 9
VCO/PLL circuit
Center
470.000MHz
Span
100MHz
10dB/
450
470
470
490
Center
470.000MHz
Span
100MHz
10dB/
450
470
470
480
Fig. 8
TK-890/(B)
TK-890H(B)
Содержание TK-890/(B)
Страница 80: ...TK 890 B H B TK 890 B H B 79 WIRING ...
Страница 96: ...TK 890 B H B TK 890 B H B BLOCK DIAGRAM 119 ...
