DVR-505/7000
5
CIRCUIT DESCRIPTION
Port No.
Port Name
I/O
Description
60
4228 RST
O
CS4228 (IC1) RESET
61
LC7821 CE
O
LC7821(TUNER PACK) CHIP ENABLE
62
SM7346 CE
O
SM7346 (IC84) CHIP ENABLE
63
T MUTE
O
TUNER MUTE
64
S MUTE
O
REAR SIGNAL MUTE
65
C MUTE
O
CENTER SIGNAL MUTE
66
F MUTE
O
FRONT SIGNAL MUTE
67
W MUTE
O
SUB WOOFER SIGNAL MUTE
68
CS49326 RST
O
CS49326 DSP IC (IC5) RESET
69~71
DSP (A15~A17)
O
DSP ROM ADDRESS (SEL 1~3)
72~88
SEG (1~17)
O
FIP SEGMENT
89
VDD
-
VDD (DIGITAL VDD)
90,91
SEG18,19
O
FIP SEGMENT
92-100
GRID (11~3)
O
FIP GRID
Port No.
Port Name
I/O
Main
Alternate function
Function
Input
Output
Audio DAC
51
DAC SCLK
O
Over sampling clock
EXT AUD CLOCK
52
DAC PCMOUT0
O
PCM out 0
EXD AUD DATA
53
DAC PCMOUT1
-
PCM out 1 (unused)
EXT AUD REQ
54
DAC PCMOUT2
-
PCM out 2 (unused)
55
DAC PCMCLK
I/O
PCM clock
56
DAC LRCLK
O
Left/Right clock
EXT AUD WCLK
57
SPDIF OUT
O
SPDIF out
48
VDD PCM
-
VDD(+3V3)
49
VSS PCM
-
GND
Clock & Reset
124
RESET
I
Chip reset
122
VDD PLL
-
VDD PLL
123
VSS PLL
-
GND
120
PIX CLK
I
27MHz main clock
PIOs and communication
186
PIO0(0) T STROBE
I/O
PIO0(0)
UART0 data
187
PIO0(1) MOD SW
I/O
PIO0(1)
ATAPI RD
188~191
PIO0(2)~PIO0(5) O
Unused
PIO0(6) SLIDER SENSOR
192
OPEN/CLOSE
I/O
PIO0(6)
(DRAWER POSITION)
193
PIO0(7) SLIDER IN
(DRAWER CCW/CTRL)
I/O
PIO0(7)
194
PIO1(0) SDA
I/O
PIO1(0)
SSC0 data
(MTSR out/MRST in)
195
PIO1(1) SCL
I/O
PIO1(1)
SSC0 clock
196
PIO1(2) SLIDER OUT
(DRAWER CW CTRL)
I/O
PIO1(2)
PARA DVALID
197
PIO1(3) TXD(JIG)
I/O
PIO1(3)
UART2 TXD
200
PIO1(4) RXD(JIG)
I/O
PIO1(4)
UART2 RXD
201
PIO1(5) FRONT TXDI
I/O
PIO1(5)
PARA SYNC
UART1 RXD
202
TRIGGER IN
I/O
Trigger in for DCU
203
TRIGGER OUT
I/O
Trigger out for DCU
204
PIO2(0) H/P IND
-
Unused
205
PIO2(1) FRONT RXD
I/O
PIO2(1)
PARA SYNC
206
PIO2(2) -
Unused
207
PIO2(3) -
Unused
208
PIO2(4) AUDIO MUTE
I/O
Audio mute
2. Port list sorted by function for MPEG Processor IC(Main IC201)