DP-SE7/SE7
(
G
)
/SE9
4
CIRCUIT DESCRIPTION
PIN No.
PIN NAME
I/O
DESCRIPTION
1~7
Grid 2G~8G
O
FL Digit control (Grid 2G~8G)
8
Vdd
O
Power supply (+5)
9
SQCK
O
Q-data read clock output.
10
STBY
O
Not use (OPEN)
11
SUBQ
I
Q-data (or SLT SW) input
12
KR 1
I
Key return input 1
13
KR 0
I
Key return input 0
14~16
NC
I
Not use (PULL DOWN)
17
RESET
I
Reset input
18, 19
NC
I
Not use (PULL DOWN)
20
AVss
–
Not use (GND)
21~24
NC
I
Not use (PULL DOWN)
25
SDT
O
Enable output to KAN03
26
SCK
O
Clock output to KAN03
27
S GATE
O
Data output for KAN03
28
NC
I
Not use
29
AVdd
–
Not use (+5V)
30
AVref
–
Not use (GND)
31
DEFECT
I
Scratch disk compel sat
32
XT2
–
Not use (OPEN)
33
Vss
–
GND
34
X1
I
System clock
35
X2
–
System clock
36
RMUTE
O
Analog mute
37
CLK
O
CXD2507AQ clock output
38
LATCH
O
CXD2507AQ latch output
39
DATA
O
CXD2507AQ data output
40
SENSE
I
SENSE/GFS/F.OK input
41
D.S
O
Not use
42
S.DATA
I/O
Serial DATA I/O
43
S.BUSY
I/O
Serial BUSY I/O
44
SCOR
I
Sub-code synch detect
I
Not use (PULL DOWN)
O
Focus lock compensation
I
REMOCON
–
GND
I
Tray close (L : close)
I
Tray open (L : open)
I
Not use (PULL DOWN)
–
Power supply (+5V)
O
Motor [OPEN] (H : OPEN/T.U.DOWN)
O
Motor [CLOSE] (H : CLOSE/T.U.UP)
O
Not use (OPEN)
65~70
Sa~Sf
O
FL Segment (SEG Sa~Sf)
71
Vlord
–
FL driver power supply (-30V)
72~77
SEG Sg~Sl/KS 5~0
O
FL Segment Sg~Sl and key scan (KS5~KS0)
78, 79
NC
O
Not use (open)
80
GRID 1G
O
FL digit (Grid 1G)
1-2 Pin description
(uPD78044FGF-071 : X25, IC4)
DP-SE7(G)/SE9(K)
COVER(
97.11.27
11:26
PM
y [ W
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