Keithley KPCI-3101 Series, Руководство пользователя

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2-2 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual
This section describes the analog input, analog output, digital I/O, and counter/timer features of
the KPCI-3101–4 Series board. To frame the discussions, refer to the block diagram shown in
Figure 2-1 . Note that bold entries indicate signals you can access.
Figure 2-1
Block diagram of the KPCI-3101–4 series boards
Analog input features
This section describes the features of the analog input (A/D) subsystem, including the following:
•
Input resolution
• Analog input channels
•
Input ranges and gains
• A/D sample clock sources
•
Analog input conversion modes
• Trigger sources and trigger acquisition modes
•
Data formats and transfer
• Error conditions
Trigger/Clock
Logic
A/D Counter,
24-bits
TScan Counter
24-bit
Ext A/D Clock
Ext TTL Trig
20 MHz Clock
A/D Clk
Analog In
16 Channel Mux
Ch. Sel
Gain Amp
(1, 2, 4, 8)
ADC
Tristate Buffers
1 kSample
Input FIFO
PCI Bus Interface
PCI Bus
Gain Sel
A/D Clk
DIO Ports A
and B
Input Sel
Ch. Sel
1 K Entry
CGL FIFO
CGL Reg.
Channel
Parameter
Reg.
Gain Sel
Input Sel
Bidirectional
8-bit Latch
Bidirectional
8-bit Latch
20 MHz
Clock
DIO Port B
[7:0]
DIO Port A
[7:0]
User Clk [3:0]
User Gate [3:0]
User Out [3:0]
4 User
Counter/
Timers,
16-bit ea.
Discard
sample
Multiplying
DAC*
Multiplying
DAC*
Analog
Output 1
Analog
Output 0
DIO Port C [6:0]
*DACs not included on KPCI-3101,
or KPCI-3103
boards.
SW_Clk1
SW_Clk0
Ser_Da
Ser_Clk