Keithley DAS-4300 Series, Руководство пользователя

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2-16 Functional Description
the pacer clock and output on the Trg I/O connector; this delay is called
the ETS delay. The trigger output signal then generates the input signal,
and the entire process repeats.
The effect of ETS is that samples are digitized at progressively increasing
time intervals until the entire waveform is characterized. Since the ADC
only digitizes one sample when a trigger is received, acquisition is not
limited by the conversion rate of the ADC, but eventually by the total
analog input circuitry of the board.
Figure 2-4 illustrates how ETS works. In this example, the delayed start
of the input signal causes the DAS-4301/8K board to sample the signal at
different points in the two acquisitions described previously. During
acquisition 1 with a larger ETS delay shift, the pacer clock occurs earlier
with respect to the input signal; therefore, the data from this acquisition is
sorted into the even-numbered samples of the combined data set: 0, 2, 4,
and so on. The data from acquisition 2 is sorted into the odd-numbered
samples: 1, 3, 5, and so on.