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11-18 Status Structure Model 2520 User’s Manual
Event enable registers
As Figure 11-1 shows, each status register set has an enable register. Each event register
bit is logically ANDed (&) to a corresponding enable bit of an enable register. Therefore,
when an event bit is set and the corresponding enable bit is set (as programmed by the
user), the output (summary) of the register will set to 1, which in turn sets the summary bit
of the Status Byte Register.
The commands to program and read the event enable registers are listed in Table 11-7 . For
details on programming and reading registers, see “Programming enable registers,”
page 11-5 , and “Reading registers,” page 11-6 .
NOTE The bits of any enable register can be reset to 0 by sending the 0
parameter value with the appropriate enable command (i.e.
STATus:OPERation:ENABle 0).
Table 11-7
Event enable registers commands
Command Description Default
*ESE <NDN> or <NRf>
*ESE?
STATus
:OPERation
:ENABle <NDN> or <NRf>
:ENABle?
:MEASurement
:ENABle <NDN> or <NRf>
:ENABle?
:QUEStionable
:ENABle <NDN> or <NRf>
:ENABle?
Program Standard Event Enable Register. See Parameters .
Read Standard Event Enable Register.
STATus Subsystem:
Operation Event Enable Register:
Program enable register. See Parameters .
Read enable register.
Measurement Event Enable Register:
Program enable register. See Parameters .
Read enable register.
Questionable Event Enable Register:
Program enable register. See Parameters .
Read Measurement Event Enable Register:
Note
Parameters:
<NDN> = #Bxx…x Binary format (each x = 1 or 0)
= #Hx Hexadecimal format (x = 0 to FFFF)
= #Qx Octal format (x = 0 to 177777)
<NRf> = 0 to 65535 Decimal format
Note: Power-up and STATus:PRESet resets all bits of all enable registers to 0. *CLS has no effect.