Keith & Koep GmbH
Functional specification
MT6N (MT606)
26
von
49
A.5
JTAG connector (CPLD)
On the MT6 there are two CPLD by Xilinx which can be programmed through an 6-
pin header with the following pinout.
A.6
RS232 connector (port 3)
The connector J5 is a male DB9 connector with the following pin description.
4
nc
not connected
5
nc
not connected
6
nc
not connected
7
CANH
positive differential signal
8
nc
not connected
9
CAN_VCC
Power Supply CAN
TABLE 13.
J4 - JTAG connector (CPLD)
Pin
Signal
Description
1
+3V3
Power Supply
2
GND
Ground
3
XC_TCK
Clock signal
4
XC_TDO2
Output signal
5
XC_TDI
Input signal
6
XC_TMS
Mode signal
TABLE 14.
J5 - Serial Interface connector (port 3)
Pin Signal
Description
1
DCD3_V24X
Data Carrier Detect
2
RXD3_V24X
Receive Data
3
TXD3_V24X
Transmit Data
4
DTR3_V24X
Data Terminal Ready
5
GND
Ground
6
DSR_V24X
Data Set Ready
7
RTS3_V24X
Request to Send
8
CTS3_V24X
Clear to Send
9
+5V
Power Supply
TABLE 12.
J3 - CAN connector
Pin Signal
Description