JVC MX-G65V, Руководство по обслуживанию, Страница: 51 / 89

MX-G68V/MX-G65V
1-51
3. Pin function
Pin No. Symbol I/O
Function
21-28 P[7:0] I YCrCb pixel inputs. They are latched on the falling edge of CLK.
YCrCb input data conform to CCIR 601.
29 CLK I 2x Pixel clock input for 8-bit YCrCb data.
32 VSYNCN I/O Vertical sync input/output. VSYNCN is latched/output following
the rising edge of CLK.
1 HSYNCN I/O Horizontal sync input/output. HSYNCN is latched/output following
the rising edge of CLK.
16 MASTER I Master/slave mode select. A logical high for master mode
operation. A logical 0 for slave mode operation
15 CBSWAP I Cr and Cb pixel sequence set up pin. A logic high swap the Cr
and Cb sequence.
14 SVIDEO I SVIDEO select input pin. A logic high selects Y/C output. A logic
low selects composite video output.
13 SLEEP I Power save mode. A logic high on this pin puts the chip into
power-down mode.
17-20 Mode[3:0] I Mode configuration pin.
2 TEST I Test pin. These pins must be connected to DGND.
9 VREF_IN I Voltage reference input. An external voltage reference must
supply typical 1.235V to this pin. A 0.1uF ceramic capacitor must
be used to decouple this input to GND. The decoupling capacitor
must be as close as possible to minimize the length of the load.
This pin may be connected directly to VREF_OUT.
8 VREF_OUT O Voltage reference output. It generates typical 1.2V voltage
reference and may be used to drive VREF_IN pin directly.
5 FSADJ --- Full-Scale adjust control pin. The Full-Scale current of D/A
converters can be adjusted by connecting a resistor (RSET)
between this pin and ground. The relationship is
6 COMP --- Compensation pin. A 0.1uF ceramic capacitor must be used to
bypass this pin to VAA. The lead length must be kept as short as
possible to avoid noise.
4 CVBS_Y O Composite/Luminance output. This is a high-impedance current
source output. The output format can be selected by the PAL pin.
The pin can drive a 37.5 W load. If unused , this pin must be
connected directly to GND.
11 CVBS_C O Composite/Chroma output. This is a high impedance current
source Output. The output format can be selected by the PAL pin.
The pin can drive a 37.5 W load. If unused, this pin must be
connected directly to GND.
10 NC --- No connection
31 VDD --- Digital power pin
30 DGND --- Digital ground pin
7 VAA --- Analog power pin
3,12 AGND --- Analog ground pin
W9952QP