JVC GZ-EX210BUA, Руководство по обслуживанию

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<MAIN(FELIX) SCHEMATIC DIAGRAM>
Note : The parts numbers in the schematic diagram are for references only.
When replacing the parts, refer to the PARTS LIST.
yf 400 _y10985001a3/8_20111123_ver0.1
5
AUDIO_CLK
AUDIO_CS
AUDIO_OUT
TP_SEL2
LCD_CLK
TP_SEL1
LCD_DATA
MBE_CS
CPU_TCK
CPU_TDO
CPU_TDI
CPU_RTCK
CPU_TMS
AOBD
AIOLRCK
AIBD
DDR_DQ06
DDR_DQ31 DDR_DQ26 DDR_DQ28 DDR_DQ29 DDR_DQ27 DDR_DQ24 DDR_DQ20 DDR_DQ21 DDR_DQ23 DDR_DQ25 DDR_DQ22 DDR_DQM2 DDR_DQ08 DDR_DQ16 DDR_DQ18 DDR_DQ14 DDR_DQ09 DDR_DQ13 DDR_DQM0 DDR_DQM1 DDR_DQ19 DDR_DQ12 DDR_DQ10 DDR_DQ17 DDR_DQ11 DDR_DQ00 DDR_DQ05 DDR_DQ04 DDR_DQ06 DDR_DQ02 DDR_DQ07 DDR_DQ03 DDR_DQ01
DDR_DQ02 DDR_DQ04 DDR_DQ03 DDR_DQ05
DDR_DQS0
DDR_DQ12
DDR_DQ10 DDR_DQ13 DDR_DQ19 DDR_DQ21 DDR_DQS2
DDR_DQ30 DDR_DQ28 DDR_DQ27 DDR_DQ29 DDR_DQS3
DDR_DQ00 DDR_DQ01 DDR_DQ07
DDR_DQM0
DDR_DQ09
DDR_DQ08
DDR_DQ11
DDR_DQ26 DDR_DQ24 DDR_DQ25
DDR_DQ23 DDR_DQM2
DDR_DQM3 DDR_DQ31
DDR_DQ22
DDR_BA0
DDR_BA1
DDR_XRAS
DDR_XCAS
DDR_XCS0
DDR_XWE
DDR_A05
DDR_A04
DDR_A02
DDR_A00
DDR_A03
DDR_A01
DDR_A07
DDR_A06
DDR_A13 DDR_A12 DDR_A10 DDR_A11 DDR_A08 DDR_A09
AIOBCK
AOMCLK
DDR_DQ14 DDR_DQ15 DDR_DQ17 DDR_DQ20 DDR_DQM1 DDR_DQ18 DDR_DQS1 DDR_DQ16
DDR_CK0 DDR_XCK0 DDR_A09 DDR_A08 DDR_A11
DDR_A10
DDR_A12
DDR_A13 DDR_A00
DDR_A04 DDR_A05
DDR_XCS0 DDR_XCAS
DDR_CKE0
DDR_XRAS DDR_BA1 DDR_BA0
DDR_A06 DDR_A07
DDR_A03
VDDE_MDDR
DDR_XCK0 DDR_CK0 DDR_DQS0 DDR_DQS1 DDR_DQS2 DDR_DQS3
IF_TX
IF_RX
MBE_SRST
CPU_NTRST
DDR_DQM3
LCD_GO_7 LCD_GO_6 LCD_GO_5 LCD_GO_4 LCD_GO_3 LCD_GO_2 LCD_GO_1 LCD_GO_0
MBE_CLK
MBE_IN
MBE_OUT
UARXD0
UATXD0
LCD_RST
LCD_CS
REG_SD
REG_SD
REG_SD REG_1.8V VDDE_3.1V
IF_TX
CPU_TDI
CPU_TMS
CPU_TCK
CPU_RTCK
CPU_TDO
JTAG_SEL1
JTAG_SEL1
PMD1 PMD2 PMD3 PMD4 PMD5 PMD6 PMD7 PMD8 PMD9
PMD10 PMD11 PMD12 PMD13 PMD14 PMD15
PMA2 PMA3 PMA4 PMA5 PMA6 PMA7 PMA8 PMA9
PMA10 PMA11 PMA12 PMA13 PMA14 PMA15 PMA16
AUDIO_OUT
AUDIO_CLK
AUDIO_CS
BE_INT3
LCD_DATA
LCD_CS
AIBD
UATXD0
TP_SEL1
TP_SEL2
MBE_OUT
MBE_IN
MBE_CLK
MBE_CS
MBE_EEP_IN
MBE_EEP_OUT
MBE_EEP_CLK
MBE_EEP_CS
AIOLRCK
AOBD
PMA10 PMA12 PMA8 PMA9 PMA11 PMA3 PMA4 PMA7 PMA15 PMA14 PMA2 PMA5 PMA6
PMA16 PMA13
PMD6
PMD15
PMD3
PMD11 PMD10
PMD4 PMD7 PMD9 PMD8
PMD12 PMD13 PMD14
BE_INT3 PMD2
OP_THRMO
XPMWE0
PMD0
UARXD0
DDR_DQ15 DDR_DQ30
DDR_CKE0
REG_3.3V
XPMWE0
PMA1
PMD0
XPMOE
XPMCS0
VDDE_2.8V
S D W P 0
S D C D 0
S D C M D 0
S D C L K 0
S D 0 _ D A T 0
S D 0 _ D A T 1
S D 0 _ D A T 2
S D 0 _ D A T 3
L C D _ G O _ 0
L C D _ G O _ 1
L C D _ G O _ 2
L C D _ G O _ 3
L C D _ G O _ 4
L C D _ G O _ 5
L C D _ G O _ 6
L C D _ G O _ 7
L C D _ C L K O
L C D _ V D O
L C D _ H D O
REG_1.1V
S D 2 _ D A T 0
S D 2 _ D A T 1
S D 2 _ D A T 2
S D 2 _ D A T 3
S D 2 _ D A T 4
S D 2 _ D A T 5
S D 2 _ D A T 6
S D 2 _ D A T 7
S D 2 _ C L K
S D 2 _ C M D
SFLASH_IF_CLK SFLASH_IF_DI SFLASH_IF_DO SFLASH_IF_CS
XPMOE PMD5
DDR_XWE DDR_A01 DDR_A02
PMD1
PMA1
M B E _ E E P _ I N
M B E _ E E P _ O U T
M B E _ E E P _ C L K
M B E _ E E P _ C S
P _ D E T _ L
C M O S _ R S T
C M O S _ C L K
C M O S _ C S
C M O S _ O U T
H D _ C M O S
V D _ C M O S
OPDRV_PSX
W / B _ E
O P D R V _ P S X
O P D R V _ I N _ Z
OPDRV_IN_F
O P D R V _ I N _ F
K E Y _ A
K E Y _ B
Z O O M _ S W
T R I G _ S W
MVD
L A M P _ O N
ZOOM_SW
T P _ X
T P _ Y
Z_PTR_AD_1
F_PTR_AD_1
O P _ T H R M O
LCD_HDO
LCD_CLK
O P D R V _ S C L
O P D R V _ S D A
KEY_B KEY_A MENU
M E N U
MBE_SRST
D C K P _ A
D C K M _ A
LCD_VDO
PLL_1.2V
REG_SD
R E G _ S D
PLL_1.2V
X P M C S 0
P M D 1
P M D 0
X P M O E
S F L A S H _ I F _ C L K
S F L A S H _ I F _ D I
S F L A S H _ I F _ D O
S F L A S H _ I F _ C S
LAMP_ON
S D 2 P O W E R
SD2POWER
A U D I O _ P D _ L
A U D I O _ P D _ L
XPMCS0
CPU_NTRST
LCD_CLKO
R E G _ 3 . 3 V
R E G _ 3 . 3 V
B L L E V E L _ C T L
B L L E V E L _ C T L
P_DET_L
SD2_DAT0 SD2_DAT1 SD2_DAT2 SD2_DAT3 SD0_DAT0 SD0_DAT1 SD0_DAT2 SD0_DAT3 SD2_CMD SDCMD0 SDWP0 SDCD0
D_GYRO_CS OPDRV_IN_Z
IF_RX
D _ G Y R O _ C S
D _ G Y R O _ I N
D _ G Y R O _ O U T
D _ G Y R O _ C L K
D_GYRO_IN D_GYRO_OUT D_GYRO_CLK
DDR_DQ34
DDR_DQ33
DDR_DQ36
DDR_DQ37
DDR_DQ32
DDR_DQ39
DDR_DQ35
DDR_DQ38
DDR_DQS4
DDR_DQM4
DDR_XCK2
DDR_CK2
DDR_CKE1
DDR_A12
DDR_A11
DDR_A09
DDR_A08
DDR_A07
DDR_A06
DDR_A05
DDR_DQ55
DDR_DQ48
DDR_DQM6
DDR_A04
DDR_DQ53
DDR_DQS6
DDR_DQ51
DDR_DQ54
DDR_DQ52
DDR_DQ50
DDR_DQ49
D D R _ D Q 4 3
D D R _ D Q 4 2
D D R _ D Q 4 1
D D R _ D Q 4 5
D D R _ D Q 4 7
D D R _ D Q 4 0
D D R _ D Q 4 6
D D R _ D Q 4 4
D D R _ D Q S 5
D D R _ A 1 3
D D R _ D Q M 5
D D R _ X W E
D D R _ X C A S
D D R _ X R A S
D D R _ X C S 1
D D R _ B A 0
D D R _ B A 1
D D R _ A 1 0
D D R _ A 0 0
D D R _ A 0 1
D D R _ A 0 2
D D R _ D Q M 7
D D R _ A 0 3
D D R _ D Q S 7
D D R _ D Q 5 6
D D R _ D Q 6 2
D D R _ D Q 5 7
D D R _ D Q 6 0
D D R _ D Q 5 8
D D R _ D Q 6 1
D D R _ D Q 5 9
D D R _ D Q 6 3
D D R _ D Q 6 3
D D R _ D Q 6 2
D D R _ D Q 6 1
D D R _ D Q 6 0
D D R _ D Q 5 9
D D R _ D Q 5 8
D D R _ D Q 5 7
D D R _ D Q 5 6
D D R _ D Q M 7
D D R _ D Q S 7
D D R _ D Q 5 5
D D R _ D Q 5 4
D D R _ D Q 5 3
D D R _ D Q 5 2
D D R _ D Q 5 1
D D R _ D Q 5 0
D D R _ D Q M 6
D D R _ D Q S 6
D D R _ D Q 4 8
D D R _ D Q 4 7
D D R _ D Q 4 6
D D R _ D Q 4 5
D D R _ D Q 4 4
D D R _ D Q 4 3
D D R _ D Q 4 2
D D R _ D Q 4 1
D D R _ D Q 4 0
D D R _ D Q M 5
D D R _ D Q 4 9
D D R _ D Q S 5
D D R _ D Q 3 9
D D R _ D Q 3 7
D D R _ D Q 3 6
D D R _ D Q 3 5
D D R _ D Q 3 3
D D R _ D Q 3 2
D D R _ D Q 3 4
D D R _ D Q M 4
D D R _ D Q S 4
D D R _ C K 2
D D R _ X C K 2
D D R _ C K E 1
D D R _ X C S 1
W I F I _ A T T A C H
W I F I _ S P I _ C S
W I F I _ S P I _ C K
W I F I _ S P I _ D O
W I F I _ S P I _ D I
L C D _ R S T
W I F I _ R X
W I F I _ T X
W I F I _ R S T
W I F I _ W K U P
W I F I _ A T T A C H
W I F I _ S P I _ C S
W I F I _ S P I _ C K
W I F I _ S P I _ D O
W I F I _ S P I _ D I
W I F I _ R X
W I F I _ T X
W I F I _ R S T
W I F I _ W K U P
D P P A D
D M P A D
U S B D P
U S B D N
W I F I _ U S B D P
W I F I _ U S B D P
W I F I _ U S B D N
W I F I _ U S B D N
D C K P _ A
D C K M _ A
BT_CTL
BT_CTL
VDDE_MDDR
VDDE_MDDR
D D R _ D Q 3 8
D O P 2 _ A
D O M 2 _ A
D O M 3 _ A
D O P 3 _ A
D O P 3 _ A
D O M 3 _ A
D O P 0 _ A
D O M 0 _ A
D O P 1 _ A
D O M 1 _ A
D O M 3 _ C
D O P 3 _ C
D O M 2 _ C
D O P 2 _ C
D O M 1 _ C
D O P 1 _ C
D O M 0 _ C
D O P 0 _ C
D O P 2 _ A
D O M 2 _ A
D O P 0 _ A
D O M 0 _ A
D O P 1 _ A
D O M 1 _ A
D O P 0 _ C
D O M 0 _ C
D O P 1 _ C
SCLK
D O M 3 _ C
D O P 3 _ C
D O M 2 _ C
D O P 2 _ C
D O M 1 _ C
REG_3.3V
REG_3.3V
T R I G _ S W
W I F I _ K E N T 0
SD2_DAT7 SD2_DAT6 SD2_DAT5 SD2_DAT4
TP_X TP_Y
OPDRV_SCL OPDRV_SDA
W/B_E
Z_PTR_AD_1
F_PTR_AD_1
V B U S
SDCLK0 SD2_CLK
REG_2.8V
R E G _ 2 . 8 V
R E G _ 2 . 8 V
AIOBCK
AOMCLK
SCLK
CMOS_RST
H D _ C M O S
V D _ C M O S
CMOS_CS
CMOS_OUT CMOS_CLK
V D D E _ 2 . 8 V
VDDE_3.1V
V D D E _ M D D R
V D D E _ M D D R
REG_1.1V
R E G _ 1 . 1 V
R E G _ 1 . 8 V
R E G _ 1 . 8 V
SIGN0031253 SIGN0031253
GND
REG_1.1V
R3053
2.2k R3052
2.2k
R3048
27k
R3019
OPEN
C3014
0.1
R3023
15k R3024
11k R3025
3.3k
L C D _ H D O
L C D _ C L K O
L C D _ V D O
REG_1.8V
REG_2.8V
REG_5.0V
U S B D P
U S B D N
T M D S _ D 1 +
T M D S _ D 2 -
H D M I _ S C L
H D M I _ C E C
T M D S _ C L K -
T M D S _ C L K +
H D M I _ S D A
T M D S _ D 0 +
T M D S _ D 1 -
T M D S _ D 0 -
T M D S _ D 2 +
A U D I O _ O U T
A U D I O _ C S
A U D I O _ C L K
T M D S _ R E G 5 V
C3031
OPEN
C3032
1
C3033
OPEN
T P _ S E L 2
T P _ S E L 1
L C D _ C L K
L C D _ D A T A
M B E _ C S
M B E _ C L K
U A T X D 0
U A R X D 0
CPU_TDO
CPU_RTCK
AIOLRCK
AOBD
AIBD
C3012
0.1
C3002
0.1
SCLK
REG_3.3V
AOMCLK
AIOBCK
C3102 0.1
C3104
0.1
R3036 R3035
C3020
OPEN
C3019
OPEN
IF_RX
IF_TX
C3024
C3030 OPEN C3029 OPEN
C3021
OPEN
# R3058
47k
MBE_SRST
R3057
2.2k
MBE_RST
CPU_TMS
CPU_TDI
CPU_NTRST
CPU_TCK
MBE_RST
FLSH_RST
R3054 2.2k
K3005
NRSA63J-0R0X
OPEN
C3037
OPEN
M B E _ I N
M B E _ O U T
JTAG_SEL1
L C D _ G O _ 0
L C D _ G O _ 1
L C D _ G O _ 2
L C D _ G O _ 3
L C D _ G O _ 4
L C D _ G O _ 5
L C D _ G O _ 6
L C D _ G O _ 7
C3011
0.1
C3001
0.1
P_DET_L
V B U S
H D M I _ H P D
TL3205
# C3201
C3025
OPEN
L C D _ C S
L C D _ R S T
S Y I N
BOOT_SEL_1
R3002
1k
L C 3 0 0 1
N Q R 0 6 5 2 - 0 0 1 X
1 2
3
C3015
0.1
VDDE_2.8V
C3016
0.1
KEY_A
I C 3 0 0 4 M M 3 4 0 4 A 1 2 U - X
O P E N
1 C E
2 V S S 3 V O U T
4 V D D
TL3007
AK5
CC_P34
AC2
CC_P6
AN19 DQMDDR_59
A24
TXCP
V16
VSS
AA28
LCD_GO_1
T12
CDRV2
C24
AVSE_HDMI
AR16
VSS
J30
SD1POWER
AP17 DQMDDR_63
F17
HD_CMOS
P6
CPU_A6
C14
BE_SCK3
AP21 DMMDDR_6
AE28
VDD_OFF
AE6
CC_P15
A7
BE_INT0
AG12
VDD
AL30
ADDRMDDR_3
Y17
VSS
V5 XCPU_WRH
E20 SDADIN_4 AN23
DQMDDR_44
AK30
VDDE_MDDR
AN26
DQMDDR_37
AL7 DOM0_B
AG10
VDD
M34
XATARST/IOM1_CLE
B32
AVDE_CVF
W14
VSS
AB24
VSS
K33
SD0CMD
J27
VSS
H3
CPU_A21
E25
SCL
R35
ATAIORDY/IOM0_RB1
B20
VSS
U3
CPU_D5
L5
CPU_A7
J2
CPU_A15
B15 VSS
AR11 DOP2_C
AG16 MCLK_SEL0
AK10
LVDS_VE
N31
ATADT_6/IOM1_DT_6
M1
KEY_E
AP13
DCKM_C
AL35
VDDE_MDDR
Y12 MACROTEST_2
T33
XATACS0/IOM0_ALE
AC22
VSS
N6
AVDE_KEY
F9 AD_DATA0
AL27 DQMDDR_36
F27 APP_PRT_OVRCUR_I
H33
SD1DAT_0
J21
VDD
D34
SD2CMD
AE34
DQMDDR_8
AC18
AVSI_PLL1
AN27 DQMDDR_35
AH33
DQMDDR_0
H10 VDDE_AUD
A16
SDADIN_15
P27 VDDE_IOM
AG30
VSS
AJ30
VDDE_MDDR
AD16
PLL2I
U30
LCD_GO_7
AA35
DQSMDDR_2
P1
CPU_A2
V1
CPU_D0
E17
SDADIN_6
AG19
VDD
AA8
VDDE_OP2
AR7
DCKP_A
R2
CPU_D14
W19
VSS
H27
VDD
AD20
AVDI_PLL3
AR14
VSS
F26 CEC
R23
VSS
V27
LCD_VDO
AK14 CLKADM_EXT
D2 CPU_TDO
B24 TXCM
Y33
DQMDDR_26
AH30
VSS
AK35
XCKMDDR_0
L9
VDD
AC33
DQMDDR_13
T18
VSS
AB33
DQMDDR_16
E35
SD2DAT_1
B7
BE_INT1
AB5
CC_P3
G35
SD1CLK
R15
VSS
N12
VSS
W3 XCPU_WRL
W23
VSS
J13
VDDE_PRC11
M14
VSS
AE35
VSS
AN32
WENMDDR
C32
AVSE_CVF
AF5
AVDE_ADC
A25 EXT_SWING
AM34
ADDRMDDR_11
AN20
DQMDDR_57
AC3
CC_P9
AA30
VDDE_MDDR
T13
VSS
J31
SD0WP
AR17
DQMDDR_62
AR20
DQMDDR_54
C15 C_HSYNC
F18
VDDE_SD
AP18 DMMDDR_7
AP27 DMMDDR_4
AA15
VSS
Y18 VSS
AF8
CC_P13
A8
PWM_AUDIO
P8 VDDE_PRC2
AP22 DQMDDR_49
Y21
VSS
P35
ATADT_12/IOM0_DT_4
AG13
VDDE_CLK3
H19
FUSE_EN
AL31
ADDRMDDR_2
V6 CPU_BSIZE
AN24
DQMDDR_40
AK31
ADDRMDDR_7
M20
AVDI_PLL5
B33
DA_VREF_VIDEO
U9
VSS
M35
ATADT_0/IOM1_DT_0
L6
CPU_A8
AK20 VDDE_MDDR
B21
TX2M
W15
VSS
K34
SD0DAT_2
AB27
VSS
E26 HDP
T20
VSS
B16 SDADIN_13
J3
CPU_A16
F35
SD2DAT_0
AP25
DQMDDR_41
AG17
MCLK_SEL1
AR12
DOP3_C
AM1
CC_P24
M22
AVD_HPLL2
AH6
CC_P37
AK18
VDDE_CLK2
AK11
LVDS_VE
AD33
DQMDDR_11
N33
ATADT_5/IOM1_DT_5
T34
VSS
Y13
VSS
AC23
VSS
F10
BE_SI5
AL28
DQMDDR_34
J22
VSS
D35
SD2DAT_5
AN28 DQMDDR_32
H11 VDDE_PRC13
AH34
DQMDDR_1
AG31
DQMDDR_5
AJ31 ADDRMDDR_5
P28
ATAADRS_0/IOM0_CLE
AD17
PLL3I
U31
LCD_CLKO
AD27 VSS
E18
SDADIN_14
P2
CPU_A3
V2
CPU_D2
AG20
VSS
AA9 VDDE_OP1
R24
VSS
H28 VDDE_IO1
C7
BE_INT2
A34 VSS
R3
CPU_D15
W20 VSS
E8
DA_DATA1
AH11
CC_P39
F28
VSS
AD21 VSS
N21
AVSI_PLL4
V28
LCD_HDO
B25
AVDI_USB2
AK15
VDDE_CLK4
A33 DA_VRO_VIDEO
L27
VDD
Y34
DQMDDR_23
AL1
CC_P20
AB6
CC_P0
T19
VSS
B8 AD_LRCK
AC34
DQMDDR_14
F1
DSP_NTRST
AB34
DQMDDR_17
H1
CPU_A19
J14 VDDE_PRC10
AF1
CC_AD10
AN33
CASNMDDR
R16
VSS
N13
VSS
W5
XCPU_CS2
C33
SD2WP
W24 VSS
M15
VSS
A26
EXT12K
AM35
ADDRMDDR_9
AF6
CC_P16
AN21 DQMDDR_52
AA31
DQMDDR_21
J33
SD0DAT_1
C16 SDADIN_12
AF9
VDDE_OP6
T14
VSS
F19
VDDE_SD
AR18 DQSMDDR_7
AR21
DQSMDDR_6
C23 AVDE_HDMI
A9 BE_GPIO51
AP19
DQMDDR_56
AP28
DQMDDR_33
AA16 VSS
Y19 VSS
H20
VSS
P9 VDDE_PRC2
AP23 DQMDDR_46
Y22
VSS
R1
CPU_D13
F22
VDD
B34
VSS
AG14
CLKDAM_EXT
V8
VDDE_PRC4
M21
AVDI_PLL4
AN25 DQMDDR_42
AL33
ADDRMDDR_13
L8
VDDE_TEST2
AK33
ADDRMDDR_6
U12
VPD
N19
AVSI_PLL6
AK21 VSS
W16
VSS
K35
SD0CD
E27
VBUS
AB28
VDD_OFF
T21
VSS
B17 SDADIN_9
J5
CPU_A17
G1
PWR_GATE_3
AP26
DQMDDR_38
AG18
VDD
M23
AVD_HPLL1
AM2
CC_P25
AH8
CC_P41
AK19 VDDE_MDDR
AD34
DMMDDR_1
N34
ATADT_2/IOM1_DT_2
T35
VSS
E1
DSP_TCK
Y14 VSS
AC24 VSS
AB14
VSS
J23
VSS
A1
VSS
AR27
DQSMDDR_4
A35
VSS
AN29 BAMDDR_2
H12
VDDE_PRC12
AH35
VSS
AA17 VSS
P30
ATADT_13/IOM0_DT_5
AJ33 ADDRMDDR_4
C25 AVSI_USB2
U33 VDDE_MDDR
A18
SDADIN_7
AD28
VDD
AG21
VSS
R27
VDDE_IOM
E33
SD2DAT_6
C8 DA_DATA0 AA12
MACROTEST_3
M24
VSS
H30
SD2POWER
F29
VDD
R5
CPU_A0
AH12
CC_P38
AD22
VSS
AL11 DCKM_B
N22
AVS_HPLL2
B26
AVSE_USB2
V30
LCD_GO_4
P19
VSS
AK16 VDDE_CLK1_2
T23
VSS
L28
VDDE_IO2
B9
BE_SO5
AB8
VDDE_OP3
AC35
DQMDDR_15
F2 DSP_TDI
AN4
CC_P30
H17 HD_RST
J15 VDDE_TEST1
W1
CPU_D1
C34
SD2CD
R17
VSS
AF2
CC_AD9
N14
VSS
M16
AVDI_PLL9
AN34
CKEMDDR_0
AG23 VSS
A27
AVSE_USB1
W27
LCD_GO_6
W6
CPU_ENDIAN
AP4 DOM1_A
AJ5
CC_P45
AN1
CC_P29
AL8
DOM1_B
E11
BE_GPIO60
AC5
CC_P8
C17 SDADIN_8
AP2
VSS
Y1
XCPU_CS1
K6
CPU_A13
J34
SD0DAT_3
F20 VDDE_CLK1_1
A10
BE_GPIO57
T15
VSS
AF27 VSS
AR19
VSS
AR22
VSS
AP29
CKMDDR_3
H21 VDDE_HDMI
Y20
VSS
AH13
VDD_OFF
U18
VSS
P12 CRES
AP24
DMMDDR_5
Y23 VSS
F23
PLL7I
B35
VSS
AH17
MCLK_SEL2
U20
VSS
AG15 MCLK_MODE0
U13
VSS
L1
BE_ADVH
AD2
CC_AD13
E28
EHCI_PRT_PWR_O
AK22
VDDE_MDDR
N20
AVSI_PLL5
B18 SDADIN_5
AB30
VSS
T22
VSS
J11
VSS
J6
CPU_A18
R6
CPU_A1
G5
PWR_GATE_1
AM3
CC_P26
AH9
CC_P40
V9
VSS
AA21 VSS
AD35
DQSMDDR_1
E2
CPU_RTCK
B1
VSS
J24
VSS
Y15 VSS
AC27 VSS
AR28
VSS
M5
KEY_A
AR25
VSS
C26 AVDE_USB2
AB15
VSS
H13
VDD
A19 CLK148VIN
AN30
XCSMDDR_1
AK25
VSS
AJ1
CC_AD2
AA18
VSS
P31
ATADT_8/IOM0_DT_0
AJ34
CKMDDR_1
AB19
VSS
AD30 VDDE_MDDR
U34
DQMDDR_30
M27
VDD
C9
DA_DATA2
AG22 VSS
E34
SD2DAT_3
A2 VSS
R28
ATAADRS_1/IOM0_RE
AL14
SCLKOUT
F30
BOOT_SEL_1
P18
VSS
AA13 VSS
AD23
VSS
P20
VSS
AF31
VDDE_MDDR
AL12 VSS
B27
AVDE_USB1
N23
AVS_HPLL1
V31
VSS
T24
VDD
AN7 DOP0_B
AK17 CLKABIN
B10 BE_GPIO52
L30
VSS
F3
JTAG_SEL2
AB9 VSS
E9
AD_DATA1
AD1
CC_AD15
AP33
BAMDDR_1
H18 VBLOW
AN5
CC_P31
AG24
VSS
J16
VSS
A28 DPPAD
W2
XCPU_RD
R18
VSS
AP5
DOM2_A
M17
AVDI_PLL8
N15
VSS
AF3
CC_AD8
W8 VDDE_JACK
AR2
VSS
AN35
ADDRMDDR_12
W28
LCD_GO_3
AJ6
CC_P44
AN2
CC_P28
C18
SDADIN_3
AL9 DOM2_B
E12
BE_PWM4
K8
VDDE_JTAG
AC6
CC_P5
AG35
DQSMDDR_0
A11 BE_GPIO63
AP3
DOM0_A
Y2
XCPU_CS0
J35
SD0CLK
F21
VDD_OFF
T16
VSS
AF28
VDD_OFF
AR23 DQMDDR_47
H22
VDD_OFF
AP30 XCKMDDR_3
C1
CPU_NTRST
AH14
CLKADB_EXT
U19
VSS
P13
VSS
Y24
VDD
AH18
VDD_OFF
U21
VSS
AR1
VSS
L2
KEY_D
E29
OTG_ID
B19
SDADIN_2
U14
VSS
AK23
VDDE_MDDR
AD3
CC_AD14
AB31
DQMDDR_20
J12
VSS
J8 VDDE_PRC9
W35
VSS
R8
VDD_OFF
F11
BE_GPIO61
G6
CPU_A24
T1
CPU_D8
E19
SDADIN_10
AM33
RASNMDDR
V12
MACROTEST_0
B2 VSS
AH10
VDDE_OP7
AA22
VSS
M6
AVSE_KEY
E3 DSP_TDO
J25
VSS
AE1
CC_AD12
AC28
VDD
V17
VSS
AR29 CKMDDR_2
C27
AVDE_USB1
AR26 DQMDDR_39
A20 AVSE_HDMI
AB16
VSS
H14
VDD_OFF
AN31
ADDRMDDR_10
AK26 VDDE_MDDR
AJ2
CC_AD1
AA19
VSS
P33
ATADT_9/IOM0_DT_1
F13
BE_GPIO44
AB20
VSS
C10
BE_PWM5
M28
VDD
AL2
CC_P22
AJ35
CKMDDR_0
AD31
DQMDDR_12
A3 BE_SCK1
U35
DQMDDR_28
R30
ATADT_10/IOM0_DT_2
F31
SD1DAT_2
K27
VSS
AL15
CLK24AIN
AA14
VSS
B28 DMPAD
AD24
VSS
E21
SDADIN_1
P21
VSS
AF33
DQMDDR_4
AL13 SCLKIN
AC14 VSS
N24
VSS
V33
DQMDDR_31
B11 BE_GPIO59
T27
VDD
L31
XATADMACK/IOM1_CE0
AN8
DOP1_B
Y5
XCPU_WAIT
AG2
CC_AD6
AA1 CPU_BMODE
P22
VSS
F5 BE_SCK0
T5
CPU_D11
E10
BE_SCK5
AB12
VDD
N1
KEY_H
J17
VDD
A29 AVSE_USB1
AG25
VSS
AN6
CC_P35
AP34
VSS
U23
VSS
M18
AVDI_PLL7
N16
AVSI_PLL9
AP6 DOM3_A
AR3
DOP0_A
AP1 VSS
W30 VSS
C19 SDADIN_0
H5
CPU_A22
AH1
CC_AD5
E13 BE_SCK4
A12
BE_GPIO43
AN3
CC_P27
AL10
DOM3_B
AC8
CC_P11
K1
CPU_A9
Y3
CPU_TYPE
AF30 VDDE_MDDR
AR24 DQSMDDR_5
H23
VDD
C2 CPU_TCK
AD12
VSS
AP31 ADDRMDDR_0
AH15
CLKDAB_EXT
P14
VSS
Y27
LCD_GO_2
AH19
VDD_OFF
U22
VSS
C5
BE_SI0
K9
VDD
AH25
VDD
M2
BE_ADVR
E30
SD2CURDRV
U15
VSS
AK24 VSS
G2
PWR_GATE_2
AD5
CC_ADVRH
J9
VDDE_PRC7
R9
VDD
G30
BOOT_SEL_0
AK1
CC_P18
B3
BE_SO1
T2
CPU_D9
E5
BE_SO0
AA23
VSS
M8
VSS
V13
VSS
AC30
VDDE_MDDR
C28
AVSI_USB1
V18
VSS
AR30
XCKMDDR_2
A21
TX2P
AE2
CC_AD11
AE8
CC_P14
H15
VD_FZ
F14
BE_SO3
AH23
VDD_OFF
AB17 VSS
AL3
CC_P23
C35
SD2CLK
AK27
VSS
U5
CPU_D6
AG6
CC_P17
AL22
DQMDDR_51
V20
VSS
AA20 VSS
C11 BE_GPIO58
P34
ATADT_11/IOM0_DT_3
AJ3 VSS
W9
VDD
M30
ATADT_3/IOM1_DT_3
A4 BE_GPIO12
AB21 VSS
K28
VDDE_IO3
R31
ATAINTRQ/IOM0_RB0
F33
SD2DAT_4
B29
AVSE_USB1
E22
VDD
AR8
VSS
AL16
CLKLVDS
H34
SD1DAT_1
AF34
DQMDDR_6
AP10 DOM1_C
AN15
CLKOUT_AUX
N27
VDD
B12
BE_SO4
Y6
XCPU_CS3
AC19
AVSI_PLL2
L33
ATADMARQ/IOM1_RB0
V34
DMMDDR_3
T28
VDD_OFF
AN12
VSS
AL19 DQMDDR_60
AR33
BAMDDR_0
AN9
DOP2_B
AL24
DQMDDR_45
AE30
VSS
F6
BE_TXD1
P23
VSS
AA2
CC_BE_GP1
AG3
CC_AD4
AK6
CC_P42
A30
DA_AOUT_VIDEO2
T6
CPU_D12
AC15
VSS
AB13 VSS
J18
VDD
N2
KEY_G
AG26 VSS
AP35 VSS
H6
CPU_A23
U24
VDD
M19
AVDI_PLL6
AP7
DCKM_A
N17
AVSI_PLL8
C20 CLK27VIN
AR4 DOP1_A
AB1
CC_P2
W31
DQMDDR_29
A13 BE_GPIO35
E14 BE_GPIO36
AH2
CC_AD3
K2
CPU_A10
AC9
VSS
C3
CPU_TDI
H24
VDD
AD13
VSS
C6
BE_RXD0
P15
VSS
AP32 XCSMDDR_0
AH20
VDD
AH16 MCLK_MODE1
K10
index
Y28
LCD_GO_5
M3
KEY_C
AH26
VDD_OFF
U16
VSS
G3
JTAG_SEL1
J10 VDDE_PRC5
AD6
CC_P10
R12 CDRV1
G31
SD1CMD
B4
BE_SI1
AK2
CC_P19
E6
BE_RXD1
M9
VDD
AN17 VDDE_MDDR
AA24
VDD
T3
CPU_D10
V14
VSS
AB35
VSS
R20
VSS
C29 AVDI_USB1
A22
TX1P
AC31
DQMDDR_18
V19
VSS
AP15
CLK48IN
AR31
VDDE_MDDR
P3
CPU_A4
H16
VD_CMOS
AE3
CC_ADVRL
AE9 VDDE_OP5
F15 C_VSYNC2
AH24
VDD
D1 CPU_TMS
AB18
VSS
AL5
CC_P33
C12 BE_GPIO42
AK28 VSS
AL23
DQMDDR_50
V21
VSS
U6
CPU_D7
AG8
VDD_OFF
M31
XATADIOW /IOM1_WE
A5 BE_RTS1
W12 MACROTEST_1
Y35
DQMDDR_22
AB22 VSS
K30
SD0POWER
B30
AVDE_CVF
U1
CPU_D3
F34
SD2DAT_2
R33
ATADT_14/IOM0_DT_6
E23 PLL6I
AR9 DOP0_C
AL17 CLKAIN
F12 BE_GPIO62
H35
VSS
AK8 VSS
B13
BE_GPIO34
AP11
DOM2_C
AF35
DQMDDR_7
N28
VDD_OFF
AN16 RST_N
W17
VSS
L34
XWGATE/IOM1_ALE
Y8
VDD_OFF
AC20
AVSI_PLL3
T30
XATACS1/IOM0_CE0
AN13 VSS
V35
DQSMDDR_3
AL20
DQMDDR_58
AL25
DQMDDR_43
AR34
VSS
N3
KEY_F
AN10 DOP3_B
F7
BE_TXD0
AE31
DQMDDR_10
A31 DA_AOUT_VIDEO0
P24
VSS
J19
VDD
AA3
CC_BE_GP3
AG5
AVSE_ADC
AK7
CC_P43
AC16
VSS
T8
VDDE_PRC3
H8
VDDE_PRC8
AP14 LVDS_VE
D3
DSP_TMS
AG27 VSS
U27
VDDE_LCD
C21 AVSE_HDMI
AA33
DQMDDR_19
A14 SD_RST
AP8
LVDS_VE
AD14
VSS
N18
AVSI_PLL7
AR5
DOP2_A
AB2
CC_P1
E15
C_HSYNC2
W33
DQMDDR_25
K3
CPU_A11
AA5
CC_BE_GP2
AH3
CC_AD0
C4 BE_GPIO8
AC12
VDD
H25 VDDE_USB
AD18
AVDI_PLL1
F24 PLL5I
V23
VSS
P16
VSS
AG33
DQMDDR_2
AH21
VDD
Y30 VDDE_MDDR
AK12 LVDS_VE
AH27
VDD_OFF
U17
VSS
B22 TX1M
AD8
CC_P12
R13
VSS
N8
VDDE_PRC1
G33
SD1DAT_3
B5 BE_CTS1
W21 VSS
R21
VSS
E7 BE_INT3
M12
VSS
AK3
CC_P21
AC1
CC_P7
AN18
DQMDDR_61
C30
AVSE_CVF
AA27
LCD_GO_0
V15
VSS
A23
TX0P
T9
VDD
AR15
CLK48OUT
J28 VDDE_IO4
AP16
VSS
AR32 ADDRMDDR_1
P5
CPU_A5
F16
VD_IS
AP20
DQMDDR_55
AE5
CC_ADVRC
AE27 VSS
C13
BE_SI4
AG11
VDD
AL29 CKEMDDR_1
A17
SDADIN_11
A6 BE_CTS0
AL6
CC_P32
AN22
DQMDDR_48
AK29 VDDE_MDDR
V22
VSS
AG9 VSS
U8
VDDE_PRC4
M33
ATADT_1/IOM1_DT_1
W13
VSS
V3
CPU_D4
AB23
VSS
B31
AVDE_CVF
K31
SD0DAT_0
J26
VSS
H2
CPU_A20
E24
PLL4I
R34
ATADT_15/IOM0_DT_7
U2
VSS
L3
KEY_B
AR10
DOP1_C
AL18
VSS
J1
CPU_A14
B14 BE_SI3
AK9
VSS
N30
ATADT_4/IOM1_DT_4
AP12 DOM3_C
AG1
CC_AD7
L35
XATADIOR/IOM1_RE
Y9
VDD
T31
ATAADRS_2/IOM0_WE
AC21 VSS
N5
BE_ADVL
AN14 CLK27OP
AL21 DQMDDR_53
F8 DA_LRCKO
A32
DA_AOUT_VIDEO1
AL26
VDDE_MDDR
AR35
VSS
AN11
DCKP_B
H31
SD1WP
J20
VDD
AE33
DQMDDR_9
AH31
DQMDDR_3
AC17 VSS
D33
SD2LR
H9
VDDE_PRC6
C22
AVDE_HDMI
AG28
VDD
AD15 PLL1I
A15 C_CLKO
U28
LCD_ENO
R19
VSS
AA34
DMMDDR_2
AP9
DOM0_C
N35
ATADT_7/IOM1_DT_7
AA6
CC_BE_GP0
E16
C_VSYNC
AR6 DOP3_A
AB3
CC_P4
K5
CPU_A12
W34
DQMDDR_24
E31
SD2DAT_7
AH5
CC_P36
AD19
AVDI_PLL2
W18
VSS
AR13 DCKP_C
AC13 VSS
H26
VDD
F25
SDA
Y16
VSS
V24
VSS
AK13
VSS
P17
VSS
AH22
VDD_OFF
AG34
DMMDDR_0
Y31
DQMDDR_27
AK34
XCKMDDR_1
B23
TX0M
AH28
VDD
T17
VSS
AD9 VDDE_OP4
B6 BE_RTS0
R14
VSS
G34
SD1CD
N9
VDD
W22
VSS
M13
VSS
R22
VSS
C31
AVSE_CVF
AL34
ADDRMDDR_8
C 3 0 3 5
O P E N
C3036 OPEN
R3013
O P E N
R3004
22k
C3103
0.1
R3037
OPEN
R3038 OPEN
TL3028
TL3030
TL3031
R 3 0 1 4
O P E N
A3
NC
2
A6
NC
3
A7
NC
4
A8
NC
5
B1
NC
6
B2
WE
7
B3
RP
8
B4
DQ14
9
B5
VSS
10
B6
VSS
11
B7
DQ13
12
B8
NC 13
C1
NC 14
C2
DQ12
15
C3
DQ8
16
C4
DQ1
17
C5
OE 18
C6
DQ9
19
C7
VCC
20
C8
NC 21
D2
DQ7
22
D3
DQ4
23
D4
DQ11
24
D5
DQ10
25
D6
DQ3
26
D7
VCC
27
E2
DQ15
28
E3
A12
29
E4
DQ0
30
E5
A15
31
E6
DQ5
32
E7
DQ6
33
F2
CLK
34
F3
CE 35
F4
DQ2 36
F5
NC 37
F6
NC 38
F7
A9 39
G2
A14 40
G3
A13 41
G4
AVD 42
G5
A7 43
G6
A11 44
G7
A8 45
H1
NC 46
H2
INT 47
H3
A0 48
H4
A1 49
H5
NC 50
H6
A10 51
H7
A6 52
H8
NC 53
J1
NC 54
J2
RDY 55
J3
A4 56
J4
A5 57
J5
A2 58
J6
A3 59
J7
NC 60
J8
NC 61
K1
NC 62
K2
NC 63
K3
NC 64
K6
NC 65
K7
NC 66
K8
NC 67
C3101
0.1
D_GYRO_CLK
OP_THRMO
R3059
OPEN
TL3027 TL3026
TL3001
IC3002
XC6213B312NG-X
1 C E
2 V S S 3 V O U T
4 V I N
RT3T22M-X
Q3001
1
2
3 456
RT3T22M-X
Q3002
123
4
5
6
R3060 OPEN
TL3009
TL3010 TL3011
TL3012
TL3022
R3027
O P E N
# R3062 # C3043
OPEN
R 3 0 6 3
O P E N
# R 3 0 6 4
O P E N
# C3038
OPEN
S D 0 _ D A T 2
S D 0 _ D A T 0
S D 0 _ D A T 3
S D 0 _ D A T 1
S D C M D 0
S D C L K 0
S D 2 _ D A T 2
S D 2 _ D A T 0
S D 2 _ D A T 3
S D 2 _ D A T 4
S D 2 _ D A T 5
S D 2 _ D A T 6
S D 2 _ D A T 1
S D 2 _ D A T 7
S D 2 _ C L K
S D 2 _ C M D
S D C D 0
S D W P 0
R E G _ S D
C 3 0 4 5
0 . 1
# R3067
# R A 3 0 0 4
1 2 3 4
8 7 6 5
S F L A S H _ I F _ C S
S F L A S H _ I F _ D I
S F L A S H _ I F _ C L K
S F L A S H _ I F _ D O
# R A 3 0 0 5
1
2
3
4
8
7
6
5
# RA3007
1 2 3 4
8 7 6 5
C3018
OPEN
C3017
OPEN
T L 3 2 0 8 T L 3 2 0 9
TL3207
TL3210
X U S B H O S T
R3069
1k
M B E _ E E P _ I N
M B E _ E E P _ O U T
M B E _ E E P _ C L K
M B E _ E E P _ C S
C M O S _ O U T
C M O S _ C S
C M O S _ C L K
C M O S _ R S T
H D _ C M O S
V D _ C M O S
DOP3_A
DOM3_A
DOP2_A
DCKP_A
DOM2_A
DCKM_A
# R 3 0 7 7
R3074 OPEN
TL3034
TL3035
C3041
C3042
C3007 0.1
RA3009
1 2 3 4
8 7 6 5
C3008 0.1
R3005
22k
C3009 0.1
KEY_B
ZOOM_SW
W/B_E
OPDRV_SDA
OPDRV_SCL
OPDRV_PSX
Z_PTR_AD
F_PTR_AD
OPDRV_IN_Z
OPDRV_IN_F
T R I G _ S W
TL3211
LAMP_ON
R3091
OPEN
R3090
OPEN
R3089
OPEN
R3087
OPEN
R3086
OPEN
R3085 OPEN
R3084 OPEN R3083
OPEN
R3001 OPEN
R3011 OPEN
# C3048 0.1 # C3047 0.1
TP_Y
TP_X
R 3 1 3 0
R 3 1 2 9
R 3 1 3 1
R 3 1 3 2
R 3 1 3 3
R3080
O P E N
R3081
R3012
O P E N
C3049
1
O P E N
R3092 R3093 OPEN
R 3 1 3 5
R 3 1 3 4
R3082
O P E N
C3050 0.1
MENU
# R3095 # R3094
C3052
OPEN
C3051
OPEN
C3053
OPEN
C3054
10
C3056
OPEN
C3055
OPEN
C3058 OPEN
C 3 0 5 9
1
C3060
0.22
R3055
OPEN
R3097
R3017
1k
REG_1.1V
R 3 1 0 0
O P E N
R3021 12k C 3 0 6 1
O P E N
R3040
OPEN
C3063
OPEN
C3062
OPEN
C3064
OPEN
C3065
OPEN
C3066
OPEN
C3067
OPEN
C3068
O P E N
C3069 OPEN C3070 OPEN
C3071
OPEN
R3018
O P E N
C3073 OPEN
E2
DQS3
A2
DQ31
L9
VDDQ
H7
/CS
B1
VDDQ
F3
NC
R2
DQ15
P2
DQ13
N1
VSSQ
J8
A0
C2
DQ27
G7
/WE
K9
A3
D3
DQ26
N3
DQ12
E3
DQ24
M1
VDDQ
A3
VSSQ
H8
BA0
B2
DQ29
F7
A13
R3
VSSQ
P3
DQ14
N2
DQ11
J9
A1
C3
DQ28
L1
VSSQ
G8
/CAS
D7
DQ21
N7
DQ3
D8
DQ22
E7
DQ23
M2
DQ9
A7
VDDQ
F8
DM2
H9
BA1
B3
DQ30
R7
VDDQ
K1
A4
E9
VDDQ
C7
DQ19
L2
DQS1
G9
/RAS
P7
DQ1
E8
DQS2
M3
DQ10
A8
DQ16
F9
VSS
J1
A6
B7
DQ17
R8
DQ0
K2
DM1
F1
VDD
C8
DQ20
L3
DQ8
H1
A9
P8
DQ2
N8
DQ4
M7
DQ5
A9
VDD
J2
A7
B8
DQ18
R9
VDD
G1
CKE
K3
A5
C9
VDDQ
D9
VSSQ
L7
DQ7
H2
A11
P9
VSSQ
N9
VDDQ
M8
DQ6
J3
A8
B9
VSSQ
# I C 3 1 0 1
H 5 M S 5 1 2 2 E F R - E 3 M
M o b i l e D D R S D R A M
A1
VSS
G2
CK
K7
A2
D1
VDDQ
E1
VSSQ
L8
DQS0
H3
A12
F2
DM3
R1
VSS
P1
VDDQ
J7
A10
M9
VSSQ
C1
VSSQ
G3
/CK
K8
DM0
D2
DQ25
C3003
0.1
# R 3 0 7 8
0 `
O P E N
R3033
R3039
OPEN
R3042
OPEN
C3028
10
C3072
10
R3020 5.1k
S D 2 P O W E R
K3007
NQR0499-001X
OPEN
K3002
NQR0499-001X
K3001
NQR0499-001X
A U D I O _ P D _ L
R3031 R3032 R3034
TL3212
K 3 0 0 4
N Q R 0 1 5 4 - 0 0 4 X
RA3011 NRB04CJ-472W
1 2 3 4
8 7 6 5
C 3 0 7 4
O P E N
C3006
OPEN
I C 3 0 0 3
X C 8 1 0 1 A A 0 1 N G - X
1 C E
2 V S S 3 V O U T
4 V I N
F C 6 9 4 6 0 1 - W
Q 3 0 0 4
1 2 3
4 5 6
RA3003
1 2 3 4
8 7 6 5
RA3002
1 2 3 4
8 7 6 5
R3098 R3079
L C 3 0 0 5
N Q R 0 6 5 2 - 0 0 1 X
O P E N
12
3
R3137
OPEN
C3075
1 0
1.5k
R3128
R3065
R3061
K3006
NQR0286-009X R3302 OPEN
R 3 3 0 3
O P E N
R 3 3 0 1
O P E N
150
R3022
N Q R 0 6 7 9 - 0 0 3 X
L 3 0 0 1
1
2
3
4 5
6
7
8
N Q R 0 6 7 9 - 0 0 3 X
L 3 0 0 2
1
2
3
4 5
6
7
8
C3026
0.1
F K 3 3 0 6 0 1 - X
Q 3 0 0 3
1D
2 G
3S
R3006
O P E N
C3076
0.1
R 3 1 3 8
O P E N
R 3 1 4 1
O P E N
R3015
O P E N
R 3 5 1 2
O P E N
C3013
TL3214
TL3038 TL3039
TL3032
TL3042
TL3043
TL3056
TL3057
L C 3 0 0 2
O P E N
1 2
3
LC3003
O P E N
1 2
3
R 3 1 3 6
O P E N
VDDE_2.8V
# RA3006
1 2 3 4
8 7 6 5
# R A 3 0 0 8
1
2
3
4
8
7
6
5
# R A 3 0 1 0
1
2
3
4
8
7
6
5
# R3096 # R3103
D_GYRO_IN
D_GYRO_CS
D_GYRO_OUT
C 3 0 7 9
O P E N
R3008
R3009
R3043 O P E N R3044 O P E N
Q 4 5 0 2
2 S A 1 7 7 4 / R S / - X
R3104 OPEN
R3105
OPEN
# C3083
0.1
# C 3 0 4 0 0 . 1
# C 3 0 8 2
0 . 1
# C 3 0 7 8
0 . 1
# R3047
# R3003
TL3002
# R3016
TL3003
# R3026
# R3030
# R3041
W I F I _ S P I _ D I
W I F I _ S P I _ D O
W I F I _ S P I _ C K
W I F I _ A T T A C H
W I F I _ S P I _ C S
W I F I _ R S T
W I F I _ W K U P
W I F I _ R X
W I F I _ T X
P I 3 U S B 1 0 2 Z L E - X
# I C 3 0 0 5
1 Y +
2 Y -
3
GND
4M
-
5M
+
6 D -
7 D +
8
OE
9
VCC
10
SEL
W I F I _ U S B D P
W I F I _ U S B D N
# R3075
OPEN
# R3076
OPEN
R 3 0 7 0
R 3 0 7 1
O P E N
TL3040
TL3041
H1
A 9
H2 A 1 1
F7
A 1 3
N7
D Q 3
D2 D Q 2 5
J8 A 0
K3
A 5
G3
/ C K
E2
D Q S 3
A8
D Q 1 6
P1 V D D Q
F3
N C
D8
D Q 2 2
R2 D Q 1 5
P8
D Q 2
L8
D Q S 0
C7
D Q 1 9
F1
V D D
M3 D Q 1 0
L3
D Q 8
C8
D Q 2 0
M8 D Q 6 M2
D Q 9
L7
D Q 7
D9
V S S Q
J2
A 7
R3 V S S Q
D7
D Q 2 1
P7
D Q 1
C1 V S S Q
B2
D Q 2 9
H3 A 1 2
N2
D Q 1 1
K2
D M 1
P3
D Q 1 4
L2 D Q S 1
J1
A 6
J3 A 8
F2
D M 3
B1
V D D Q
C9 V D D Q
C2
D Q 2 7
R8
D Q 0
H8
B A 0
# IC3102
H5MS5122EFR-E3M Mobile DDR SDRAM
A1
V S S
M7 D Q 5
B8 D Q 1 8
R7 V D D Q
E7 D Q 2 3
N3
D Q 1 2
G8
/ C A S
N8 D Q 4
M1
V D D Q
L1 V S S Q
C3
D Q 2 8
F8 D M 2
H7 / C S
P2 D Q 1 3
A7 V D D Q
E8 D Q S 2
J9
A 1
D3
D Q 2 6
N1 V S S Q
F9 V S S
J7 A 1 0
B9
V S S Q
G7
/ W E
D1 V D D Q
E1
V S S Q
G9 / R A S
R9
V D D
A2 D Q 3 1
K7
A 2
K9 A 3
R1
V S S
A9
V D D
N9 V D D Q
H9
B A 1
B7 D Q 1 7
P9 V S S Q
E9
V D D Q
G1 C K E
B3 D Q 3 0
M9
V S S Q
K1 A 4
K8
D M 0
A3 V S S Q
L9
V D D Q
E3 D Q 2 4
G2 C K
R 3 5 1 3
O P E N
X 3 0 0 1
N A X 1 1 1 8 - 0 0 1 X
123
DOP0_A
DOM0_A
DOP1_A
DOM1_A
DOP0_C
DOM0_C
DOP1_C
DOM1_C
DOP2_C
DOM2_C
DOP3_C
DOM3_C
TL3058
TL3059
TL3060
TL3061
TL3062
TL3063
TL3064
TL3065
TL3066
TL3067
TL3068
TL3069
TL3070
R3056 OPEN
R3102 OPEN
W I F I _ K E N T 0
R3088
OPEN
# R A 3 0 1 2
1 2 3 4
8 7 6 5
I C 3 0 1 1
I C - P S T 8 2 2 3 U - W
O P E N
1
O U T
2
V D D
3 N C
4
G N D
# R3007 # R3010
# I C 3 0 1 0
T P S 2 0 5 1 B D B V - X
1 O U T
2 G N D
3 O C 4 E N
5 I N
# R3029
# K3008 NQR0286-009X
# R3028
L 3 0 0 3
1 2
C3034 OPEN C3084 OPEN C3085
1
2
C 3 0 2 2
O P E N
[OneNAND]
VDDE_CLK
VDDE_OP4
VDDE_OP1
VDDE_PRC12
VDDE_PRC11
VDDE_PRC10
VDDE_PRC7
VDDE_PRC5
VDDE_PRC3
VDDE_PRC1
VDDE_JACK
VDDE_AUD
VDDE_HDMI
REG_MMC
REG_SDO
VDDE_IOM
VDDE_LCD
B L L E V E L _ C T L
S Y M B O L N O .
M O D E L
S - S D 8 G B 1 6 G B 3 2 G B
K 3 0 0 8
R 3 0 6 7
R 3 0 7 8
R 3 0 9 4 ~ R 3 0 9 5
R 3 1 0 3
O P E N N R S A 6 A J - 0 R 0 W
R 3 0 2 9
O P E N N R S A 6 A J - 1 0 1 W
R 3 0 5 8 N R S A 6 A J - 4 7 3 W O P E N
R 3 0 7 7 O P E N N R S A 6 A J - 1 0 3 W
R 3 0 9 6 N R S A 6 A J - 0 R 0 W O P E N
R A 3 0 0 4
N R B 0 4 C J - 0 R 0 W
O P E N
R A 3 0 0 5 a n d R A 3 0 0 7
R A 3 0 0 6 a n d R A 3 0 1 2
R A 3 0 0 8
R A 3 0 1 0
O P E N
N R B 0 4 C J - 0 R 0 W
S Y M B O L N O .
M O D E L
T O U C H P A N E L N O N T O U C H P A N E L
R 3 0 0 7
R 3 0 1 0 N R S A 6 A J - 1 0 2 W O P E N
C 3 0 4 7
S Y M B O L N O .
M O D E L
U S B H O S T N O N U S B H O S T
I C 3 0 1 0
O P E N
R 3 0 6 2 N R S A 6 A J - 1 0 4 W O P E N
S Y M B O L N O .
M O D E L
W I F I N O W I F I
I C 3 0 0 5 P I 3 U S B 1 0 2 Z L E - X O P E N
R 3 0 7 5 O P E N N R S A 6 A J - 0 R 0 W
R 3 0 7 6
S Y M B O L N O .
M O D E L
O N E N A N D N O O N E N A N D
C 3 2 0 1 N C B A 1 A K - 1 0 4 W O P E N
I C 3 2 0 2 T C 5 8 E V G 0 S 8 E B A I B O P E N
S Y M B O L N O .
M O D E L
1 X D D R _ 5 1 2 M
2 X D D R _ 5 1 2 M
1 X D D R _ 1 G
2 X D D R _ 1 G
I C 3 1 0 1 H 5 M S 5 1 2 2 E F R - E 3 M H 5 M S 5 1 2 2 E F R - E 3 M K 4 X 1 G 3 2 3 P F - 8 G D 8 K 4 X 1 G 3 2 3 P F - 8 G D 8
I C 3 1 0 2 O P E N H 5 M S 5 1 2 2 E F R - E 3 M O P E N K 4 X 1 G 3 2 3 P F - 8 G D 8
C 3 0 4 0
O P E N N C B A 1 A K - 1 0 4 W O P E N N C B A 1 A K - 1 0 4 W
R 3 0 2 8 N R S A 6 A J - 6 8 0 W N R S A 6 A J - 1 0 1 W
N Q R 0 2 8 6 - 0 0 9 X O P E N
N R B 0 4 C J - 1 0 1 W
M O U N T
C 3 0 4 8
N C B A 1 A K - 1 0 4 W N R S A 6 A J - 0 R 0 W
C 3 0 7 8
C 3 0 8 2
C 3 0 8 3
R 3 0 0 3 R 3 0 1 6
R 3 0 2 6 R 3 0 3 0
R 3 0 4 1 R 3 0 4 7
O P E N N R S A 6 A J - 1 0 1 W O P E N N R S A 6 A J - 1 0 1 W
J C Y 0 2 4 6
I C 3 0 0 1
# IC3202
TC58EVG0S8EBAIB
68 68
100k
0`
0 `
0 `
0`
1 0 k
1k
1 5 k
1 5 k 3 9 k
3 9 k
4 7 k
1 0
OPEN
2 . 2 k
2 . 2 k
0` 0`
1 k
22
_ 0 . 5 %
22 22 22
4.7k
10 10
10 10 10
0`
150k
2 2 0 k
0`
0 `
0 `
0 ` 0 `
100
100
0 `
100