5
4
3
2
1
A
B
C
D
E
F
G
2-19
2-20
IC5501
H2
R5504
R5505
R5503
X5501
C5510
D5501
C5515
R5501
C5518
R5506
R5507
R5511
SHP
SHD
CLK18
CLK54
CLK27
R5502
R5509
L5505
L5506
C5511
R5512
R5513
R5514
C5512
C5514
C5519
PBLK
ID
C5517
OBCLP
C5513
C5509
C5508
C5507
C5504
C5501
C5503
L5502
L5503
L5504
CAM_OUT
REG-CCD
REG_15V
C5506
L5501
C5516
CAM_CLK
REG_3.1V
TG_CS
H1
TG_RST
XAVD
XAHD
GND
RG
CCD_-7V
CCD_15V
SUB
V1
V2
V3
V4
Vss2
H2
Vss3
Vdd4
SHP
SHD
XRS
DCC
Vss4
CLK18/MCK
CAM/VTR
Vdd5
RST
Vss6
SUB
VL
VH
V4
V3
V1
VM
V2
TEST
CLK13/CL
JCY0185
CTL
GND
VDD
OUT
NAX0587-001X
/35
1SS355-X
T
/20
T
/10
NQR0129-002X
NQR0129-002X
NQR0129-002X
/4
T
CS/SEN
CLK/SSK
DATA/SSI
Vdd1
VGAT
DSGAT
HCLR
RG
Vdd2
Vss1
H1
Vdd3
Vdd6
CLK27/CLK1716
ID
WEN
OBCLP
XAVD
XAHD
Vss5
CLPDM
PBLK
SSGCTL
CK
T
22
22
22
1
0.1
0
Ω
0.1
0
Ω
0
Ω
47
47
10
µ
10
µ
4.7
1K
1K
1K
10
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
47
10
µ
0.1
ID
OBCLP
XAVD
XAHD
PBLK
ID
OBCLP
XAVD
XAHD
PBLK
TO
CAM_DSP
TO CPU
TO CCD
NOTE: The parts with marked ( ) is not used.
y30213001a_rev0.1
TG SCHEMATIC DIAGRAM
0 1 MAIN(TG)