JVC CA-VSDT6R, Руководство по обслуживанию

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VS-DT9R/VS-DT6R
1-28
1. Terminal layout
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
XOUT
FM
CE
DI
CK
DO
ST/MONO
AM/FM
LW
MW
SDIN
XIN
VSS
LPFOUT
LPFIN
PD
VDD
FMOSC
AMOSC
IF REQ
FM/AMIF
Reference
Driver
Phase
Detector
Charge Pump
Unlock
Detector
Universal
Counter
Swallow Counter
1/16,1/17 4bit
12bit
Programmable
Drivers
Data Shift Register & Latch
Power
on
Reset
C2B
I/F
1/2
7 2 11 13
21
17
6
5
4
3
15
16
22
1
18
19
20
12
3. Pin function
LC72136N (IC2) : PLL frequency synthesizer
8
2. Block diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
XOUT
FM
CE
DI
CK
DO
ST/MONO
AM/FM
LW
MW
SDIN
FM/AM IF
IF REQ
AMOSC
FMOSC
VDD
PD
LPFIN
LPFOUT
VSS
XIN
I
O
I
I
I
O
O
O
I/O
I/O
I/O
I
O
-
I
I
-
O
I
O
-
I
X'tal oscillator connect (75kHz)
LOW:FM mode
Chip enable, When data output/input for 4pin(input) and 6pin(output): H
Input for receive the serial data from controller
Sync signal input use
Data output for Controller, Output port
"Low": MW mode
Open state after the power on reset
Input/output port
Input/output port
Data input/output
IF counter signal input
IF signal output
Not use
AM Local OSC signal output
FM Local OSC signal input
Power supply(VDD=4.5-5.5V), When power ON:Reset circuit move
PLL charge pump output(H: Local OSC frequency Height than Reference
frequency. L: Low Agreement: Height impedance)
Input for active low pass filter of PLL
Output for active low pass filter of PLL
Connected to GND
X'tal oscillator connect (75KHz)
Pin No. Symbol I/O Function