JRC DOLBY NJU26207, Быстрый старт

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NJU26207
- 2 -
Ver.2008-12-03
Hardware Block Diagram
Fig. 1 NJU26207 Hardware Block Diagram
Function Block Diagram
Fig. 2 NJU26207 Function Block Diagram (Firmware)
SDO SDO SDO SDO0 00 0
SERIAL SERIAL SERIAL SERIAL
HOST
HOST HOST
HOST
INTERFACE INTERFACE INTERFACE INTERFACE
AD1/SDIN AD1/SDIN AD1/SDIN AD1/SDIN AD2/SSb AD2/SSb AD2/SSb AD2/SSb
SCL/SCK
SCL/SCK SCL/SCK
SCL/SCK
SDA/SDOUT SDA/SDOUT SDA/SDOUT SDA/SDOUT
RESETb RESETb RESETb RESETb
MCK MCK MCK MCK
CLK CLK CLK CLK
CLKOUT CLKOUT CLKOUT CLKOUT
TIMING TIMING TIMING TIMING
GENERATOR GENERATOR GENERATOR GENERATOR
/ PLL
/ PLL / PLL
/ PLL
DATA
DATA DATA
DATA
RAM RAM RAM RAM
FIRMWARE
FIRMWARE FIRMWARE
FIRMWARE
ROM ROM ROM ROM
PROGRAM
PROGRAM PROGRAM
PROGRAM
CONTROL CONTROL CONTROL CONTROL
ALU ALU ALU ALU
ADDRESS ADDRESS ADDRESS ADDRESS GENERATION GENERATION GENERATION GENERATION UNIT UNIT UNIT UNIT
24 24 24 24- -- -BIT BIT BIT BIT ｘ ｘｘ ｘ 24 24 24 24- -- -BIT BIT BIT BIT
MULTIPLIER MULTIPLIER MULTIPLIER MULTIPLIER
DSP DSP DSP DSP ARITHMETIC ARITHMETIC ARITHMETIC ARITHMETIC UNIT UNIT UNIT UNIT
BCK BCK BCK BCKO O O O
SERIAL SERIAL SERIAL SERIAL AUDIO AUDIO AUDIO AUDIO
INTERFACE INTERFACE INTERFACE INTERFACE
LRO LRO LRO LRO
BCKI BCKI BCKI BCKI
LRI LRI LRI LRI
General I/O
General I/O General I/O
General I/O
INTERFACE
INTERFACE INTERFACE
INTERFACE
SEL SEL SEL SEL
L/Rout
L/Rout L/Rout
L/Rout
SDI
SDI SDI
SDI0~3
0~3 0~3
0~3 in
in in
in
WDC WDC WDC WDC
SDO SDO SDO SDO1 11 1
(L+R)/2
(L+R)/2 (L+R)/2
(L+R)/2out
out out
out
SDO SDO SDO SDO2 22 2
Monitor L Monitor L Monitor L Monitor L/R /R /R /R
PROC
PROC PROC
PROC
MUTEb MUTEb MUTEb MUTEb
L/R(SDI0)
Dolby
Volume
L/R(SDI1)
O
utp
ut
T
rim
m
er
(M
as
te
r&
B
ala
nc
e)
L/R(SDO0)
Monitor L/R(SDO2)
(L+R)/2(SDO1)
L/R(SDI2)
L/R(SDI3)
Delay