JBL Simply Cinema DSC 1000, Руководство по обслуживанию

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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Power_on
Configeration
DEBUG PORT
Q7 SCART OUT Y/VBS AND R/C SELECT
Q0 RESERVE
Q6 OPTICAL/OAXIAL INPUT SELET
Q4,Q5 Audio INPUT (AUX,SCART,TUNER)SELECT
Q1-Q3 FS0,FS1 AND RGB_SEL FOR SCART OUT
1239C-PV1
3.3
DSC1000 MAIN BOARD 041011
C
4 22 Tuesday, November 30, 2004
Title
Size Document Number Rev
Date: Sheet of
Harman Kardon, Northridge, California 91329, USA
VD1
M1
_
D
1
M1
_
D
7
M2_A1
M1
_
D
5
M2_A8
M1
_
A
7
M2_A7
M2_A0
M2_D3
AVID0
M1
_
D
9
SDIOW
R
M2_A4
M2_D2
M
1
_A11
M1
_
D
8
M2_D1
SDM
A
CK
M1
_
D
1
2
M1
_
A
9
M1
_
D
1
3
M1
_
D
2
M1
_
A
1
SCS0
M2_A11
M
1
_A10
M2_D6
M2_A10
M1
_
A
3
M1
_
D
1
5
M1
_
A
4
M1
_
A
0
M2_A9
M1
_
A
8
AVID1
M2_D7
M2_D0
M2_A5
M1
_
A
5
M1
_
D
1
0
M2_A3
M1
_
D
0
M2_A[0..11]
M1
_
A
6
M2_A6
SDM
A
RQ/dac
k
M1
_
D
3
M2_D5
M2_A2
Core_1.8
SCS1
SIRQ14
M2_D[0..7]
M1
_
D
1
4
M1
_
A
2
M2_D4
M1
_
D
6
M1
_
D
4
M1
_
D
1
1
SDA2
VD7
ADATA3
M2_A19
M2_A18
SDA[0..2]
VCC3.3Q1
M2_A20
AIN_SEL0
AIN_SEL1
ADATA2
ADATA0
ADATA1
VCC1.8Q
RESET_n
CSEL
Core_3.3
VCC3.3Q0
SDD1
0
SDD1
2
SDD3
SDD1
5
SDD6 SDD1 SDD0 SDD7 SDD2 SDD8
SDD1
4
SDD1
3
SDD4 SDD9
SDD[0..15]
SDD1
1
SDD5
SDA0 SDA1
VD4
VD4
TDO
TCK
TDI
TMS
SDIOR
ALRCK
TWARN
PWRDN
AMUTE
CLOCK/SCL
ADATA2
DATA/SDA
ASCLK
ADATA1
ADATA0
AMCLK
DI/SDA
CL/SCL
AMUTE
VD5
VD6
M
1_D
Q
M
1
M
1_D
Q
M
0
M
1
_C
LKO
M
1_BA0
M
1_BA1
M
1_W
E_n
M
1_C
AS_n
M
1
_RAS_n
M
1
_SC
S
_n
M
1_A[0..11]
M
1_D[0..15]
PWRDN
TWARN
RESET_n
M2_A[0..11]
M2_D[0..7]
M2_A19
M2_A18
M2_RAS_n
M2_CAS_n
M2_WE_n
M2_BA1
M2_BA0
M2_DQM1
M2_DQM0
M2_EOE_n
CSEL
M2_A20
T
UNERON/OF
F
CSEL
DI/SDA
REMOTE
ADATA0
ADATA1
ADATA2
VFD_CE
RESET_n
CL/SCL
DI/SDA
AMCLK
ASCLK
ALRCK
ADATA0
ADATA1
ADATA2
PWRDN
TWARN
DI/SDA
PRE_RE
VFD_CE
REMOTE
MCU-CLK
CL/SCL
VCC1.8
AV1 AV0
Core_3.3
AV1
VDD_DAC0
VCC1.8
VDD_DAC1
Core_1.8
AV0
VCC1.8
Core_1.8
Core_3.3
VCC3.3
VCC3.3
DGND
DGND
DGND
DGND DGND
DGND DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
D5VCC
DGND
Core_1.8
DGND DGND
DGND
DGND DGND
DGND
AVGND
VCC3.3
+5V
VCC3.3
VCC3.3
D5VCC
D5VCC
D5V
D5V
CB22
104
R21 10K
R11 187
R19
2.7K
CB47
104
L6 FB
CB108
104
CB39
104
CB21
104
3J3
PH-10A-2.0mm
1
2
3
4
5
6
7
8
9
MCU-CLK
SCL
SDA
VFDCE
IR
RESET
AMUTE
GND
+5V
R18
2.7K
L4
FB
CB32
104
CB44
104
CB40 104
AR2
4.7K
R22 10K
CB36
104
L8
FB
RR2
1
0
k
R25
open(OPT)
CB35
104
R9
75R
C23
22PF
CB28
104
R24
10K
CB29
104
CB41
104
+
EC1
100U/16V
FB34 FB
FB26 FB
FB31 FB
FB32 FB
R2
7
1
0
k
FB33 FB
RR1
1
0
k
C9
NA
C50
NA
C10
NA
C55
NA
C57
NA
CON1
DAMP CON/16P,1.0mm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R2
1
0
k
R3
1
0
k
Memory #1
Memory #
2
Audio
GPIO,Video
IDE / DVD_DSP
gpio0
gpio1
gpio2
gpio3
gpio4
gpio5
gpio6
gpio7
AML3370
3.3V Core 1.8V Core GND
1.8V
GND
GND
Power
TEST
CLOCKS
MPEG AUDIO VIDEO
PLL PLL PLL
GND
3.3V
3.3V
GND
GND
1.8V
GND
1.8V
U4
55 56 57 58 59 60 63 64 75 74 73 72 71 70 69 68 96 97 98 99 88 85 84 83 82 81 95 89 90 91 94 92 100 76 77
143
151
150
149
148
145
144
142
114
124
122
115
116
119
117
141
139
135
133
131
129
127
123
128
130
138
132
118
112
111
110
109
140
134
106
113
107
14 13 12 11 10 15 185 54 16 182 170 169 168 155 156 167 171 187 188 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 177 178 180 174 179 176 175 172 173
80 147 126 105 66 18 153 136 120 208 186 189 1 17 65 79 104 125 146 183 62 87 137 121 103 190 154 86 61 102
52
6
5
4
3
7
8
51
20
31
32
30
184 53 181 163 165 157 158 160 161 162 164 159
19
152
9
2
78 93 67 101
108
166
22
25
28
23
26
29
33
35
34
27
24
21
44
47
50
41
40
39
38
36
49
46
43
37
48
45
42
M
1_D
0
M
1_D
1
M
1_D
2
M
1_D
3
M
1_D
4
M
1_D
5
M
1_D
6
M
1_D
7
M
1_D
8
M
1_D
9
M
1
_D
10
M
1
_D
11
M
1
_D
12
M
1
_D
13
M
1
_D
14
M
1
_D
15
M1
_
A
0
M1
_
A
1
M1
_
A
2
M1
_
A
3
M1
_
A
4
M1
_
A
5
M1
_
A
6
M1
_
A
7
M1
_
A
8
M1
_
A
9
M
1
_A10
M1
_
W
E
_
n
M
1_C
AS_n
M
1_R
AS_n
M1
_
B
A
1
M
1_SC
S
_n
M
1_EC
S
_n
M1
_
D
QM1
M1
_
C
L
K
O
M2_D0
M2_D1
M2_D2
M2_D3
M2_D4
M2_D5
M2_D6
M2_D7
M2_D8
M2_D9
M2_D10
M2_D11
M2_D12
M2_D13
M2_D14
M2_A0
M2_A1
M2_A2
M2_A3
M2_A4
M2_A5
M2_A6
M2_A7
M2_A8
M2_A9
M2_A10
M2_A11
M2_WE_n
M2_CAS_n
M2_RAS_n
M2_SCS_n
M2_BA0
M2_ECS_n
M2_EOE_n
M2_CLKO
M2_DQM0
M2_DQM1
ADATA0 ADATA1 ADATA2 ADATA3 AOCLK AL
RCL
K
AICLK_XOUT IEC
958
AM
CLK
SCLK_XOUT RESET_n TEST_n TR
ST_n
TD
I
TM
S
TC
K
TD
O
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD1
0
DD1
1
DD1
2
DD1
3
DD1
4
DD1
5
DA0 DA1 DA2 D
IO
R
_n/s
os
DIOW
_
n
/e
rr
DIORDY/s
tb
DMARQ/d
a
c
k
DMACK_
n
C
S
0_n/r
e
q
C
S
1_n
CSEL IRQ
1
4
VDD_
1
8
VDD_
1
8
VDD_
1
8
VDD_
1
8
VDD_
1
8
VDD_
1
8
VSS_33 VSS_33 VSS_33
VDD_
1
8
VDD_
1
8
VSS_33 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18 VSS_18
VDD_
3
3
VDD_
3
3
VDD_
3
3
VDD_
3
3
VDD_
3
3
VDD_
3
3
VDD_
3
3
VSS_33 VSS_33 VSS_33
VDD_DAC1
VD3
VD4
VD5
VD6
VD2
VD1
VSS_DAC1
VSS_DAC0
RSET0
VREF0_OUT
COMP0
AICLK_XIN ADC SCLK_XIN DVDD_
PL
L
1
VSS_PLL2 AVDD_
PL
L
0
AVSS_PLL0 DVDD_
PL
L
0
AVDD_
PL
L
1
VSS_PLL1 AVDD_
PL
L
2
D
VSS_PLL0
VDD_DAC0
M2_D15
VD0
VD7
M
1
_A11
MA
_
B
A
0
M1
_
D
QM0
M
1_EO
E
_n
M2_BA1
DVDD_
PL
L
2
AVDD_DAC0_B
AVDD_DAC0_G
AVDD_DAC0_R
AVSS_DAC0_B
AVSS_DAC0_G
AVSS_DAC0_R
VRET0_IN
AVDD_DAC0
AVSS_DAC0
AVID0
AVID1
AVID2
AVID3
AVID4
AVID5
COMP1
RSET1
VREF1_OUT
VRET1_IN
AVDD_DAC1
AVDD_DAC1_B
AVDD_DAC1_G
AVDD_DAC1_R
AVSS_DAC1
AVSS_DAC1_B
AVSS_DAC1_G
AVSS_DAC1_R
CB62
104
U15
24C64
1
2
3
4
5
6
7
8
NC
NC
NC
GND
SDA
SCL
WP
VCC
CON2
ARC JTAG
1
2
3
4
5
6
+3.3V
GND
TMS
TDI
TCK
TDO
Y1
27M
L3 FB
R20
2.7K
CB38 104
CB26
104
L2
FB
C20
47PF
R12
187
CB42
104
CB37
104
CB45
104
CB20
104
CB33
104
C22
22PF
R34
10k
CB27
104
R38
10k
R36
10k
R35
10k
U5
74VHC164
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
Q0
Q1
Q2
Q3
GND CP
MR
Q4
Q5
Q6
Q7
VCC
R28
100K
CB46
104
CB19
104
CB23
104
L5 FB
CB43
104
CB17
104
+
EC2
100U/16V
CB25
104
CB31
104 CB30
104
C21
10PF
+
EC7
220U/16V
CB18
104
+ EC3
220U/16V
R23
10K
CB48
104
R17
2.7K
CB34
104
+ EC5
220U/16V
L1
FB
R16
10K
CB24
104
SCS0
SDMARQ
SDIOWR
SDD[0..15]
SCS1
SDIOR
SIRQ14
SDMACK
SDA[0..2]
DETECT
ADC_DAT
V_Y
V_C
B/Cb/Pb
G/Y/Y
R/Cr/Pr
T
UNER_
CE
DAC_ML
RCLK
SW2
AIN_SEL0
AIN_SEL1
RGB_SWITCH
TVFORMAT1
TVFORMAT0
DO
RDSCLK
HW_MUTE
ADATA3
TDI
ASCLK
ALRCK
AMCLK
VD4
VFDCLK
CL/SCL
DI/SDA
AMUTE
V_COMP
AMUTE