JBL DCR600 II, Руководство по обслуживанию

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8-bit compatible shift / store register
BU4094BC / BU4094BCF / BU4094BCFV
The BU4094BC, BU4094BCF, and BU4094BCFV are shift / store registers, each consisting of an 8-bit register and
an 8-bit latch.
As the data in the shift register can be latched by an asynchronous strobe input, it is possible to hold the output in
the data transfer mode.
The tri-state parallel output can be connected directly with an 8-bit bus line.
These registers are suitable for in-line / parallel data conversion, data receivers and other similar applications.
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Logic circuit diagram
•
Truth table
8-STAGE
SHIFT REGISTER
IN
CLOCK
SERIAL
Q
S
Q'
S
SERIAL
OUTPUT
PARALLEL OUTPUTS
8-BIT
LATCHES
STROBE
3-STATE
OUTPUTS
OUTPUT
ENABLE
Q
1
Q
8
CLOCK
OUTPUT
ENABLE
STROBE
Parallel output Serial output
Q
1
Q
n
Q
S
H H L L Q
7
NC
H H H H Q
7
NC
H L X NC NC Q
7
NC
L X X Z Z Q
7
NC
H X X NC NC NC Q
S
L X X Z Z NC Q
S
Q
n-1
Q
n-1
SERIAL IN
Q'
S
NC: No Change Z: High Impedance X: Irrelevant
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Block diagram
2
SERIAL
IN
STROBE
Q
1
Q
2
Q
3
Q
4
CLOCK 3
4
5
6
7
8
15
14
13
12
11
10
9
V
SS
1
OUTPUT
ENABLE
V
DD
Q
6
Q
7
Q
8
Q'
S
Q
5
Q
S
16
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