Jäger ADwin-Gold II, Руководство пользователя

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ADwin-Gold II , Manual February 2013
5
The ADwin-Gold II System
ADwin
Fig. 2 – Block diagram ADwin-Gold II
Analog inputs The system has 2
×
8 analog inputs with BNC plugs (alternatively: DSub connectors),
which are divided into two groups each being connected to one multiplexer. The input
signals are converted by a 18-bit analog-to-digital converter (ADC), see Fig. 2 "
Block
diagram ADwin-Gold II ".
Analog outputs The standard version of ADwin-Gold II is equipped with 2 analog outputs (optional 4 or
8) with an output voltage range of -10V … +10V and 16-bit resolution. You can syn-
chronize the output of the voltage of all DACs per software.
Digital inputs and outputs 32 digital inputs or outputs are available on D-Sub connectors. They can be pro-
grammed in groups of 8 as inputs or outputs. The inputs or outputs are TTL-compatible.
Trigger input (EVENT) ADwin-Gold II has a trigger input (EVENT, see also chapter 5.2 "Digital Inputs and Out-
puts"). Processes can be triggered by a signal and are completely processed after-
wards. (see
ADbasic manual, chapter "Structure of the ADbasic Program").
Watchdog The operation of ADwin-Gold II can be controlled with a watchdog counter. If a pro-
grammed signal is missing unexpectedly, the watchdog creates a reset signal for the
T11 and/or
TiCo processor. The reset signal can also be output on a pin as TTL level.
24 Volt signals Using the two LS bus interfaces up to 30 LS bus modules can be addressed. The LS
bus module HSM-24V provides 32 digital channels for 24 Volt signals.
T11-Bus
&
TiCo-Bus
ENET
T11 (TS 101)
TigerSHARC ™
@ 300 MHz
256 KiByte PM,
256 KiByte DM,
256 KiByte EM,
256 MiByte DX
TiCo
@ 50 MHz,
28 KiByte PM,
28 KiByte DM
EVENT
DI
O
0
0
-1
5
DI
O
1
6
-3
1
CAN(-LS) 1
CAN(-LS) 2
COM 1
(RS-232/-485)
COM 2
(RS-232/-485)
LS1
LS2
PWM
CAN1
CAN2
COM1
COM2
PROFI
Bus
18 bit, 2µs
A
D
IN 1
IN 3
IN 5
IN 7
IN 9
IN 11
IN 13
IN 15
PGA
G = 1, 2, 4, 8
+
-
MUX
D
A
D
A
16 bit
16 bit
OUT 1
OUT 4
D
A
16 bit
OUT 8
. .
.
. .
.
OP
+
-
OP
+
-
OP
+
-
. .
.
D
A
16 bit
OUT 2
OP
+
-
. .
.
. .
.
. .
.
18 bit, 2µs
A
D
IN 2
IN 4
IN 6
IN 8
IN 10
IN 12
IN 14
IN 16
PGA
G = 1, 2, 4, 8
+
-
MUX
CO1, ..., CO4 (32 bit U/D counter)
CLK/DIR
A/B
PWM
SSI 1, ..., SSI 4 (SSI decoder)
CLK/
DATA
PROFI DP-V1
LS-Bus 1
LS-Bus 2
PWM1, ..., PWM6
DIO 00-31
DIO 00-07
DIO 08-15
DIO 16-23
DIO 24-31