IRT DDC-3471 Скачать руководство пользователя страница 21

Title

SCALE

SIZE

Sheet

DRAWN

CHECKED

ENG. APP.

Revision:

DO NOT COPY NOR

DISCLOSE TO ANY

THIRD PARTY

WITHOUT WRITTEN

CONSENT

of

1

IRT Electronics Pty. Ltd.

Drawing No.

COPYRIGHT

ARTARMON NSW AUSTRALIA 2064

A3

N.T.S.

3

DDC-3471

804489

Date:

2

30-Jul-2001

1

2

3

4

5

6

7

8

9

10

PL1

N/C

C17 100n

GND

VCC

C11 100n

GND

VCC

VCC

nCONFIG

D0

DCLK

nSTATUS

CONF_DONE

DATA

1

DCLK

2

OE

3

nCS

4

GND

5

nCASC

6

VCC

7

VCC

8

IC4

EPC1

RN2

5x1k 

3V3

GND

GCLK1

79

DI1

78

GCLK2

183

DI3

182

DI2

80

DI4

184

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

36

36

37

37

38

38

39

39

40

40

41

41

44

44

45

45

46

46

47

47

53

53

54

54

55

55

56

56

57

57

58

58

60

60

61

61

63

63

64

64

65

65

67

67

68

68

69

69

70

70

71

71

73

73

74

74

75

75

83

83

85

85

86

86

87

87

88

88

89

89

90

90

92

92

93

93

94

94

95

95

96

96

97

97

99

99

100

100

101

101

102

102

103

103

104

104

111

111

112

112

113

113

114

114

115

115

116

116

119

119

120

120

121

121

122

122

125

125

126

126

127

127

128

128

131

131

132

132

133

133

134

134

135

135

136

136

139

139

140

140

141

141

142

142

143

143

144

144

147

147

148

148

149

149

150

150

157

157

158

158

159

159

160

160

161

161

162

162

163

163

164

164

166

166

167

167

168

168

169

169

170

170

172

172

173

173

174

174

175

175

176

176

177

177

179

179

180

180

186

186

187

187

189

189

190

190

191

191

192

192

193

193

195

195

196

196

197

197

198

198

199

199

200

200

202

202

203

203

204

204

205

205

206

206

207

207

208

208

IC8A

EP1K100RC-208

DATA0

156

DCLK

155

nCE

154

TDI

153

MSEL0

108

MSEL1

107

nCONFIG

105

nSTATUS

52

TMS

50

TDO

4

nCEO

3

CONF_DONE

2

TCK

1

VCCIO

5

VCCIO

22

VCCIO

42

VCCIO

34

VCCIO

66

VCCIO

84

VCCIO

98

VCCIO

110

LOCK

62

VCCIO

118

VCCIO

138

VCCIO

146

VCCIO

165

VCCIO

178

VCCIO

194

TRST

51

GND

6

GND

23

VCCINT

72

GND

35

VCCINT

48

GND

117

VCCCKLK

77

GND

82

GND

76

GND

123

GND

109

VCCINT

106

GND

32

GND

20

VCCINT

33

GND

49

VCCINT

21

GND

43

GNDCKLK

81

GND

59

VCCINT

91

GND

129

GND

137

GND

145

GND

151

GND

171

GND

181

GND

188

VCCINT

124

VCCINT

130

VCCINT

152

VCCINT

185

VCCINT

201

IC8B

EP1K100RC-208

GND

C31 100n

GND

VCC

DATA

1

DCLK

2

OE

3

nCS

4

GND

5

nCASC

6

VCC

7

VCC

8

IC5

N/C

C40

100n

C45

100n

C55

100n

C59

100n

C60

100n

C62

100n

C57

100n

C51

100n

C46

100n

C37

100n

C28

100n

C26

100n

2V5

GND

2V5

GND

C36

100n

C44

100n

C50

100n

C52

100n

C58

100n

C61

100n

C63

100n

C56

100n

C53

100n

C41

100n

C38

100n

C30

100n

GND

GND

C29

100n

C27

100n

3V3

3V3

PSYNC_OUT

DVAL_OUT

SPI_OUT0

SPI_OUT1

SPI_OUT2

SPI_OUT3

SPI_OUT4

SPI_OUT5

SPI_OUT6

SPI_OUT7

SPI_ENA

SPI_CLK

PCLK_IN

SPI_IN0

SPI_IN1

SPI_IN2

SPI_IN3

SPI_IN4

SPI_IN5

SPI_IN6

SPI_IN7

RELSW

RELCOM

ASIOUT

PS1

PS3

PS2

PS4

INENA

SPI IN/OUT

804489i2s2.SCH

PSYNC_OUT

DVAL_OUT

SPI_OUT1

SPI_OUT0

SPI_OUT3

SPI_OUT2

SPI_OUT4

SPI_OUT5

SPI_OUT7

SPI_OUT6

SPI_ENA

SPI_CLK

SPI_IN0

SPI_IN1

SPI_IN2

SPI_IN3

SPI_IN4

SPI_IN5

SPI_IN6

SPI_IN7

PCLK_IN

SPI_IN0

SPI_IN1

SPI_IN2

SPI_IN3

SPI_IN4

SPI_IN5

SPI_IN6

SPI_IN7

PCLK_IN

PSYNC_OUT

DVAL_OUT

SPI_OUT1

SPI_OUT0

SPI_OUT3

SPI_OUT2

SPI_OUT4

SPI_OUT5

SPI_OUT7

SPI_OUT6

SPI_CLK

RELAY CONTACTS SHOWN IN

 "NOT-ENERGISED" POSITION

5

1

10

3

8

RELAY1

RELAY-SPCO

VCC

TR9

BSS123

GND

RELAY

D1

BAV99

PRES

SYNC

RSERR

TS188

TS204

SCRAM

RS

INTER

RELAY

RELCOM

A

B

LK5

RELSW

RELSW

RELCOM

REAR ASSEMBLY

804489i2s3.SCH

3

2

4

GND

1

GND

5

SW1

3

2

4

GND

1

GND

5

SW2

3

2

4

GND

1

GND

5

SW3

GND

VCC

SW1A

SW1B

SW2A

SW2B

SW3A

SW3B

SW1A

SW1B

SW2A

SW2B

SW3A

SW3B

TXD0

TXD1

TXD2

TXD3

TXD4

TXD5

TXD6

TXD7

TXENA

TXCLK

C39

10n

C48

10n

C49

10n

C47

100n

C54

10u

L4

470nH

VCC

GND

VCC

R15

120R

R14

120R

C32

100n

VCC

8

VEE

5

IN+

7

IN-

6

Q1n

4

Q1

3

Q0n

2

Q0

1

IC6

CLC007

C34

100p

C33

10n

R16 180R

R13 180R

GND

GND

C42

4u7

R12

150R

R17

75R

SVS

10

BISTENn

5

MODE

7

GND

6

VCCN

4

OUTC+

3

OUTC-

2

OUTB-

1

VCCQ

9

RP

8

D7

11

D6

12

D5

13

D4

14

SC

19

GND

20

D3

15

D2

16

D1

17

D0

18

CKW

21

VCCQ

22

ENA

23

ENN

24

FOTO

25

OUTA-

26

OUTA+

27

OUTB+

28

IC7

CY7B923

VTX

VCC

GND

C13

100n

C14

10n

C12

10u

VCC

GND

N/C

1

FOUT

8

VCC

14

GND

7

XO1

XO

ASICLK

C43

100n

TXD0

TXD1

TXD2

TXD3

TXD4

TXD5

TXD6

TXD7

TXENA

ASICLK

GND

ASIOUT

ASIOUT

FL3

FL4

FL1

FL2

~

~

DB1 DB106

~

~

DB2 DB106

F4

4R7

F3

4R7

F1

4R7

F2

4R7

PS1

PS2

PS3

PS4

C4

1500u

C2

1500u

C7

100n

C6

100n

C5

100n

C8

100n

C1

330u

C10

330u

VCC

VCC

C15

100n

GND

R11 820R

C19

100n

C23 100n

C25

10u

R10 820R

VIN

1

GND

2

VOUT

3

CASE

IC2

LM3940

C20

100n

C16

100n

C22

47u

3V3

GND

GND

2V5

GND

C18

10n

VIN

3

VOUT

2

ADJ

1

CASE

0

IC3

LM317TO

LD6

LD5

TR2

BSS123

TR1

BSS123

R3

820R

R2

820R

VCC

GND

LD8

LD7

TR4

BSS123

TR3

BSS123

R5

820R

R4

820R

LD2

LD9

TR6

BSS123

TR5

BSS123

R8

820R

R6

820R

LD4

LD3

TR8

BSS123

TR7

BSS123

R9

820R

R7

820R

PRES

SYNC

RSERR

TS188

TS204

SCRAM

RS

INTER

PRES

SYNC

RSERR

188

204

SCRAM

RS

(INTERLEAVING) 

INTER

TXCLK

PS1

PS2

PS3

PS4

VIN+

1

VIN-

2

VOUT+

5

VOUT-

3

CASE

G1

CASE

G2

IC1

PBBA-2405B

L1

22u

LD1

R1 820R

RN1 9x10k

GND

POWER

INENA

SPI_ENA

INENA

5

4

3

2

RN3

4x10k

LK4

LK3

LK2

LK1

VCC

LK2

LK3

LK4

LK1

C35

10n

TXENN

TXENN

LK1

LK2

LK3

LK4

GND

C21

100n

C24

100n

GND

SPI TO SPI, ASI WITH RS, INTER, SCRAM

L3

L2

C3

100n

L5

470n

C9

10u

R21

22R

C70

47p

GND

C71

47p

R22

22R

GND

IRT 

Communications 

www.irtcommunications.com

Содержание DDC-3471

Страница 1: ...nd on the Internet at http www irtelectronics com I R T Electronics Pty Ltd A B N 35 000 832 575 26 Hotham Parade ARTARMON N S W 2064 AUSTRALIA National Phone 02 9439 3744 Fax 02 9439 7439 Internation...

Страница 2: ...tallation in frame or chassis 8 Connections 9 Front rear panel connector diagrams 9 Operation 10 Front indicators 10 Processing controls 10 Maintenance storage 11 Warranty service 11 Equipment return...

Страница 3: ...ts lower processing speed requirements The ASI O interface is of limited usefulness due to the specification of multimode fibre with only a short haul capability Optical transport of ASI can be better...

Страница 4: ...randomisation Scrambling The Sync 1 Byte is inverted according to the MPEG 2 framing structure and the data stream randomised for spectrum shaping purposes Reed Solomon RS encoder A shortened Reed Sol...

Страница 5: ...Temperature range 0 50 C ambient Mechanical Mounts in IRT FRU 1030 1 RU 19 rack chassis with input output and power connections on the rear panel Finish Front panel Grey enamel silk screened black let...

Страница 6: ...ith the interleaver and RS encoder enabled SPI Output The SPI output uses differential LVDS signalling with a standard 25 pin D female connector The output is disabled when Input Loss Alarm is trigger...

Страница 7: ...MPEG TS will be disturbed The time taken before normal decoding resumes is dependent on the decoder in use and may be up to five seconds LK 1 OUT Standard Operation IN Sets transport stream indicator...

Страница 8: ...utions should be observed Where individual circuit cards are stored they should be placed in antistatic bags Proper antistatic procedures should be followed when inserting or removing cards from these...

Страница 9: ...ata 3 B 8 Data 2 A 21 Data 2 B 9 Data l A 22 Data 1 B 10 Data 0 A 23 Data 0 B 11 DVALID A 24 DVALID B 12 PSYNC A 25 PSYNC B 13 Cable Shield Alarm connections J 1 Alarm relay output Front rear panel co...

Страница 10: ...different MPEG TS formats In this context the word scrambling refers to the process of Sync1 inversion and randomisation for the purpose of energy dispersal of the signal It does not refer to the enc...

Страница 11: ...inable from the component supplier Equipment return Before arranging service ensure that the fault is in the unit to be serviced and not in associated equipment If possible confirm this by substitutio...

Страница 12: ...ta transfer is synchronised to the Byte clock of the MPEG transport stream The data to be transmitted are MPEG 2 transport packets The data signals are synchronised to the clock depending on the trans...

Страница 13: ...rial data stream The disparity characteristics of the code maintain DC balance Special characters are defined as extra code points beyond the need to encode a Byte of data One in particular is used to...

Страница 14: ...e PRBS registers is initiated at the start of every eight transport packets To provide an initialisation signal for the de scrambler the MPEG 2 sync Byte of the first transport packet in a group of ei...

Страница 15: ...Byte stream by the input switch Each branch is a First In First Out FIFO shift register with depth Mj cells where M 17 N I N 204 error protected frame length I 12 interleaving depth branch index The c...

Страница 16: ...dB Electrical characteristics CCITT G 703 34368 Kb s Cable type Coaxial Impedance 75 Signal level 1 0 V Nominal pulse width 14 55 ns Code conversion HDB3 Pulse shape Fig 17 G 703 Jitter at input port...

Страница 17: ...simplifying system design Note that the ASI signal is polarity sensitive Although most 270 Mb s SDI DA s and switchers will pass ASI signals the line drivers used usually have both inverted and non i...

Страница 18: ...11 12 GHz satellite services ETS 300 429 Digital broadcasting systems for Television sound and data services framing structure channel coding and modulation for cable systems ETS 300 473 Digital broad...

Страница 19: ...U CCITT recommendation G 703 HDB3 High Density Bi polar of order 3 IF Intermediate Frequency IRD Integrated Receiver Decoder ITU International Telecommunications Union LSB Least Significant Bit LVDS L...

Страница 20: ...10 2007 Drawing index Drawing Sheet Description 804489 1 DDC 3471 circuit schematic 804489 2 DDC 3471 circuit schematic 804489 3 DDC 3471 circuit schematic I R T C o m m u n i c a t i o n s w w w i r...

Страница 21: ...SPI_OUT1 SPI_OUT2 SPI_OUT3 SPI_OUT4 SPI_OUT5 SPI_OUT6 SPI_OUT7 SPI_ENA SPI_CLK PCLK_IN SPI_IN0 SPI_IN1 SPI_IN2 SPI_IN3 SPI_IN4 SPI_IN5 SPI_IN6 SPI_IN7 RELSW RELCOM ASIOUT PS1 PS3 PS2 PS4 INENA SPI IN...

Страница 22: ...22B 23A 23B 24A 24B 25A 25B 26A 26B 27A 27B 28A 28B 29A 29B 30A 30B 31A 31B 32A 32B M1 M2 PL2 DIN64M VCC GND VCC GND VCC GND SPI_ENA SPI_ENA SPI_ENA SPI_OUT1 SPI_OUT0 SPI_OUT3 SPI_OUT2 SPI_OUT4 SPI_O...

Страница 23: ...OUT0 DVAL_OUT DVAL_OUT PSYNC_OUT PSYNC_OUT SPI_OUT5 SPI_OUT5 SPI_OUT4 SPI_OUT4 SPI_OUT2 SPI_OUT2 SPI_OUT3 SPI_OUT3 SPI_CLK SPI_CLK SPI_OUT6 SPI_OUT6 SPI_OUT7 SPI_OUT7 SPI_IN1 SPI_IN1 SPI_IN0 SPI_IN0 S...

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